Jau-Horng Chen

A Miniaturized 3 dB Branch-Line Hybrid Coupler With Harmonics Suppression

This letter presents a miniaturized 3 dB branch-line hybrid coupler with second harmonic suppression using high-impedance transmission lines and interdigitated shunt capacitors. By using the interdigitated capacitors shunt with the transmission lines, further minimization of the 3 dB branch-line hybrid coupler can be achieved compared with previously reported techniques. The design of the interdigitated shunt capacitors requires concurrent optimization of the capacitance to the ground and the edge-coupling interdigitated capacitance between the ports. For validation, a miniaturized 3 dB branch-line hybrid coupler at 836.5 MHz was designed and implemented. The proposed 3 dB branch-line hybrid coupler achieved a compact size of 27.75 mm × 25.7 mm, or equivalently 0.077λo×0.072λo, where λo is the free-space wavelength. Moreover, the coupler can suppress second harmonic components by 20 dB while maintaining similar measured performance compared to the conventional branch-line hybrid coupler.

A low voltage W-CDMA polar transmitter with digital envelope path gain compensation

This letter presents a polar transmitter using a dual-phase pulsewidth-modulated buck converter with a 50-MHz effective switching frequency. Using a wideband code division multiple access voice signal, the overall system can achieve 52.8% drain efficiency (49.8% power added efficiency) at 24-dBm output power at 836.5MHz with a 3.5-V supply voltage, while passing both adjacent channel leakage power ratio (ACLR1) and alternate channel leakage power (ACLR2) specifications. A digital finite impulse response filter is included in the envelope path to compensate for gain roll-off at higher baseband frequencies. This envelope path compensation allows greater linear bandwidth to be achieved at lower switching frequencies, thus boosting efficiency, and improving ACLR by as much as 8dB. The polar transmitter is characterized over a supply voltage of 2.5-4.5V, making it well suited for battery powered, handheld applications

A Polar-Transmitter Architecture Using Multiphase Pulsewidth Modulation

This paper presents a transmitter architecture based on a pulse-modulated polar transmitter using multiphase pulsewidth modulation. The modulation to the radio-frequency input signal, instead of conventional drain modulation, significantly reduces the circuit complexity, while the multiphase modulation technique reduces the out-of-band emissions. An 836.5-MHz four-phase prototype transmitter using four class-C power amplifiers in parallel was constructed. Using the transmitter, single-phase, two-phase, and four-phase pulsewidth modulated signals were tested to verify the benefits of using the proposed multiphase architecture. Using a CDMA2000 1X signal, 46.8% efficiency at a 29-dBm output power level was measured while passing the spectral-mask requirements without using any kind of digital predistortion or calibration.

An envelope elimination and restoration power amplifier using a CMOS dynamic power supply circuit

This paper presents a CDMA power amplifier using Kahn envelope elimination and restoration technique. A CMOS delta-modulated envelope amplifier with over 3MHz bandwidth is used as the dynamic power supply. Internal feedback was used on the envelope amplifier to reduce delay. A commercially available 1W GaAs/AlGaAs HFET power amplifier was tested in conjunction with the envelope amplifier. Using an IS-95 CDMA signal, a peak output power of 25 dBm was obtained at 836 MHz while achieving a maximum efficiency of 48% with ACPR of 47.9 dBc.

A High-Efficiency CMOS DC-DC Converter With 9-

This paper presents an efficient CMOS dc-dc converter with fast transient recovery. A fast-transient control operating in conjunction with a linearly scaled gate-driving technique is used to concurrently improve the transient response and light-load efficiency of a dc-dc converter. The controller operates under a pulse-width modulation mode during steady state and enables a saturation mode during transient to attain fast transient response. The linearly scaled gate-driving technique optimizes the gate-driving voltage with respect to the changing load leading to lower gate-driving loss and better light-load efficiency. A prototype chip was implemented using a commercial 0.35-μm CMOS process to validate the proposed techniques. The measurement result shows a 5% increase in light-load efficiency and achieves an overall maximum efficiency of 90%. Moreover, the transient recovery time of a 450 mA step load change is less than 9 μs.

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This letter presents a multi-level pulse modulated polar transmitter architecture. Compared to a conventional gate-modulated envelope elimination and restoration transmitter, the use of the proposed technique is capable of reducing the in-band quantization noise level. Moreover, the proposed technique can increase the pulse-width modulation sampling frequency by relaxing its resolution requirement, which eases the filtering requirement at the output. A prototype transmitter system is constructed using commercially available components. Using a CDMA2000 1X signal at 836.5 MHz, it achieved over 40% power-added efficiency at 24.5 dBm output power level while passing the adjacent and alternate channel power ratios for the CDMA2000 standard.

s Transient Recovery Time

This paper presents a spurious emission suppression technique for RF power amplifiers using frequency-hopping DC-DC converters. The frequency-hopping technique changes the switching frequency of the DC-DC converter dynamically and reduces the peak spur created by using a DC-DC converter with a radio frequency power amplifier. The use of this technique can also reduce the size of the external passive components used for reducing the ripple voltage of the DC-DC converter, which creates the radio frequency spurs. A prototype system using a cellular band power amplifier operating at 836.5 MHz and a commercial DC-DC converter was built to verify this technique. Measurement results show by frequency-hopping between eight frequencies, the maximum radio frequency spur can be reduced by more than 11 dB.

A Multi-Level Pulse Modulated Polar Transmitter Using Digital Pulse-Width Modulation

This paper presents a highly efficient polar transmitter using interleaving pulse modulation for multiple communication standards. Using the proposed interleaving pulse modulation technique, a polar transmitter can suppress the odd-order output spurs deeply with a feasible value of essential sampling frequency and keep the residual spurs from falling into the receive bands. To validate the proposed technique, a prototype polar transmitter was constructed and evaluated. Using global system for mobile communications, enhanced data rates for GSM evolution, and wideband code division multiple access (WCDMA) signals at 836.5 MHz, the polar transmitter achieved 68%, 45.5%, and 41.2% power-added efficiency at output power levels of 28, 26, and 25 dBm, respectively. The measurement results were able to pass the spectral requirements defined by the respective standards without the use of any pre-distortion or calibration techniques. Moreover, the polar transmitter was able to achieve an output dynamic range of 80 dB required by the WCDMA standard.

A spurious emission reduction technique for power amplifiers using frequency hopping DC-DC converters

Baseband digital predistortion (DPD) is an efficient and low-cost method for linearizing a power amplifier (PA) in a wireless system using a modulation scheme with nonconstant envelope. The polynomial and the lookup table (LUT) predistortion schemes are two commonly used approaches. Both approaches require time to find the inverse characteristics of the PA to be predistorted. However, for DPD to be actually implemented in real-world scenarios, fast convergence is highly desirable. A low-complexity joint-polynomial/LUT predistortion PA linearizer is proposed to obtain fast linearization. The algorithm utilizes quadratic interpolation of the LUT, which reduces the required LUT size and hence reduces convergence time without degradation of linearity. Simulation result shows that the proposed method can achieve up to 500% improvement in convergence speed compared with the conventional linear interpolation approach for the wideband code-division multiple access application.

A Polar Transmitter Using Interleaving Pulse Modulation for Multimode Handsets

This letter presents a method for improving the efficiency of a power amplifier (PA) under load mismatch by recycling the reflected power. By configuring the PA as a balanced PA, the reflected power will be directed to the isolation port of a 90° hybrid coupler. The reflected power can then by rectified and converted back to dc power to assist in supplying the PA. A prototype system was built to validate the concept and tested under various load phase angles with 2:1 and 4:1 VSWR using a W-CDMA voice signal at 836.5 MHz. Measurement results show that the power recycling technique improves the overall efficiency by as much as 22.1% when the output power level is 25 dBm. Under load conditions and power levels where the rectifier cannot provide sufficient output voltage level to supply the PA, the proposed technique simply maintains the original PA efficiency with no degradation.