Jau-Yuann Yang

SOC CMOS technology for personal Internet products

Worldwide demand for Personal Internet Products is increasing rapidly, and will shape the directions of CMOS technology in the years ahead. Personal Internet Products are loosely defined in this paper as communication, computing and consumer products, which are enabled by the Internet: cell phones, PDAs, WLANs, Internet audio/video, ADSL, cable modems etc. Personal Internet Products are based on Digital Signal Processing (DSP) and analog functionality. They are made accessible to billions of people around the globe by intense focus on cost through SOC integration. In the Internet Age, Moores Law will continue to be a technology imperative for the semiconductor industry. But SOC integration will be an additional technology imperative that drives down the cost of Personal Internet Product to mass market levels. SOC integration for Personal Internet Products requires the integration of analog, power analog, RF and memory onto the digital baseband processor, which is fabricated in high density, high performance, low cost digital CMOS technology. This paper describes the challenges and some of the solutions to achieve this vision.

Planar AlGaAs/GaAs HBT fabricated by MOCVD overgrowth with a grown base

A planar heterojunction bipolar transistor (HBT) with an AlGaAs emitter layer epitaxially grown onto a selectively defined grown base layer, where the base is grown with the collector as part of the original epi, is discussed. The transistors fabricated with this process exhibit good gain and output characteristics. Transistors with 7*7 mu m/sup 2/ emitters have exhibited a DC current gain of 10 to 1000 for base doping from 1*10/sup 19/ to 8*10/sup 17/ cm/sup 3/, respectively, and Early voltages >or=100 V. The propagation delay of 19-stage ring oscillators was 87 ps/gate. The transistor-fabrication process was designed to be manufacturable, and the planar nature of the transistor surface should permit large-scale integration with good yields. >

GaAs BIJFET technology for linear circuits

BIJFET (bipolar junction FET) technology that integrates p-channel JFETs and n-p-n HBTs (heterojunction bipolar transistors) has been developed. The devices are fabricated using epi overgrowth of an AlGaAs layer onto a GaAs layer, which simultaneously results in the emitter on the base for the n-p-n and the gate on the channel for the PJFET. The individual HBTs and PJFETs showed better stability over a wide temperature range than comparable Si devices. A prototype op amp was designed to demonstrate the capability of the BIJFET process. A measured open-loop gain of 50 dB and an open-loop gain bandwidth product of 3.6 GHz compare favorably with those of Si monolithic BIJFET op amps.<<ETX>>