Jean-Paul Eggermont

Design of SOI CMOS operational amplifiers for applications up to 300/spl deg/C

Design guidelines using two analog parameters (Early voltage and transconductance to drain current ratio) are proposed for correct operation of silicon-on-insulator (SOI) CMOS operational amplifiers (opamp) at elevated temperature up to 300/spl deg/C. The dependence of these parameters on temperature is first described. A new single-stage CMOS opamp model using only these two parameters is presented and compared to measurements of several implementations operating up to 300/spl deg/C for applications such as micropower (below 4 /spl mu/W at 1.2 V supply voltage), high gain (65 dB) or high frequency up to 100 MHz. Trade-offs among such factors as gain, bandwidth, phase margin, signal swing, noise, matching, slew rate and power consumption are described. The extension to other architectures is suggested and the design methodology is valid for bulk as well as SOI CMOS opamps.

Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits

This paper demonstrates that fully-depleted (FD) silicon-on-insulator (SOI) technology offers unique opportunities in the field of low-voltage, low-power CMOS circuits. Beside the well-known reduction of parasitic capacitances due to dielectric isolation, FD SOI MOSFETs indeed exhibit near-ideal body factor, subthreshold slope and current drive. These assets are both theoretically and experimentally investigated. Original circuit studies then show how a basic FD SOI CMOS process allows for the mixed fabrication and operation under low supply voltage of analog, digital and microwave components with properties significantly superior to those obtained on bulk CMOS. Experimental circuit realizations support the analysis.

Improved synthesis of gain-boosted regulated-cascode CMOS stages using symbolic analysis and gm/ID methodology

A systematic study of the gain-boosted regulated-cascode operational transconductance amplifier (OTA) CMOS stage is presented. Symbolic analysis is used first to describe the pole-zero behaviour and second to propose design criteria for optimal settling time. A synthesis procedure based on the “gm/ID” methodology is considered further on for quick optimization of the architecture based on the dc open-loop gain, transition frequency, and settling time specifications. Practical design cases are finally discussed.

Potential of SOI for analog and mixed analog-digital low-power applications

SOI technology offers significant assets for low-voltage, low-power high-speed logic. The steeper subthreshold slope of SOI MOSFETs not only improves design of low-voltage logic circuits, but also offers also opportunities for low-power analog design. Identical DC gains can be achieved in SOI and bulk either with less current or smaller geometries, or both. This is illustrated by plots of total area and stand-by current versus DC open-loop gain of two identical Miller op amps, one bulk and one SOI.

Design of thin-film fully-depleted SOI CMOS analog circuits significantly outperforming bulk implementations

Although the reduction of parasitic capacitance and the feasibility of diffusion resistors and capacitors free of junction effects have long been recognized as advantages for the realization of analog circuits on SOI substrates, few SOI analog circuits have been reported mainly because the kink effect severely degrades the output characteristics of thick-film SOI MOSFETs and thereby the performances of analog circuits. Operational amplifier solutions such as the use of body contacts, twin-gate devices or gain-boosting have been proposed but offer little improvement over bulk CMOS counterparts, with the exception of the resistance to elevated temperatures. In the present paper we propose new design models and techniques which, by exploiting the smaller subthreshold swing and body factor of thin-film fully-depleted (FD) SOI MOSFETs, could provide a major breakthrough in order to boost the performances of SOI CMOS analog circuits substantially over bulk implementations, especially in the field of low-voltage low-power applications.

Design and application of SOI CMOS OTAs for high–temperature environments

Special techniques are presented for the design of SOI CMOS OTAs which have to operate from room up to very high ambient temperatures. The results of several implementations are reported including applications such as in bandgap and current references as well as Σ-Δ modulators with efficient switch design at elevated temperatures.

A 1-GHz operational transconductance amplifier in SOI technology

This work investigates the feasibility of realisation of SOI CMOS Operational Transconductance Amplifiers (OTA) operating up to 1 GHz. In contrast to a previously published microwave wideband amplifier driving low ohmic resistive line termination, OTAs for Switched-Capacitor (SC) applications need a high impedance and capacitive output node. In addition applications such as sigma-delta converters require fast OTAs. In order to reduce the settling time, the transfer function should also include a minimal amount of poles and zeros. Consequently in spite of its low voltage gain, this single-stage OTA could be of interest for high-frequency applications.

Improvement of the performances of SOI CMOS operational amplifiers by means of a gain-boosting stage

Both measurements and simulations have shown that the use of a gain-boosting architecture increases significantly the gain of the amplifier. Up to now, we have obtained very encouraging measurement results: a DC gain of 90 dB and a transition frequency of 30 MHz on a 16 pF load. The next prototypes under fabrication should give full satisfaction and correspond to the initial specifications: a DC gain of 120 dB and a transition frequency of 60 MHz on a 16 pF load.<<ETX>>

Advanced SOI CMOS technology for RF applications

Thin film fully depleted silicon-on-insulator CMOS technology, devices and circuits for RF applications are presented. These submicron MOSFET transistors can achieve a maximum oscillation frequency of 30 GHz for a 1 V power supply. This kind of performance and the advantages of the SOI transistors fit the needs for low-voltage low-power RF applications. To demonstrate the capabilities of this technology we present a single stage OTA with a f/sub T/ of 1.1 GHz and /spl phi//sub M/ of 30/spl deg/, and two CMOS mixers with exceptional linearity results.

Synthetic microwave inductors in SOI technology

One of the most promising approaches in the field of active filtering has been the replacement of conventional passive resonators with active resonators that are based on high frequency inductance-simulating-circuits. For the first time the possibilities to realize synthetic inductors in SOI MOSFET technology is demonstrated. Compared to the conventional spiral inductors the active inductors have attractive features; lossless characteristic, operation over a wide microwave range, size independent of the inductance value, and easy construction in MMICs. All these advantages are important in the GHz frequency range where many of the wireless communication applications operate.