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Suraj Mathew

Micron Technology

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Publication

Featured researches published by Suraj Mathew.

Solid-state Electronics | 2000

Cryogenic temperature non-scaling of linear resistance in n-MOSFETs exhibiting reverse short-channel effect

Guofu Niu; John D. Cressler; Suraj Mathew; Seshu Subbanna

Abstract An enhancement of the non-scaling of the linear resistance with channel length is observed at low temperatures, despite reduced reverse short channel effect. This imposes a significant limitation on the low temperature operation of deep submicron CMOS devices. An increased surface roughness scattering in shorter channel devices is suggested to explain the gate overdrive and temperature dependence.

Archive | 2011

Methods of forming recessed access devices associated with semiconductor constructions

Kunal R. Parekh; Suraj Mathew; Jigish D. Trivedi; John K. Zahurak; Sanh D. Tang

Archive | 2006

Capacitorless DRAM on bulk silicon

Suraj Mathew; Jigish D. Trivedi

Archive | 2005

Method to simultaneously form both fully silicided and partially silicided dual work function transistor gates during the manufacture of a semiconductor device, semiconductor devices, and systems including same

Jigish D. Trivedi; Suraj Mathew

Archive | 2011

Methods Of Forming A Vertical Transistor And At Least A Conductive Line Electrically Coupled Therewith, Methods Of Forming Memory Cells, And Methods Of Forming Arrays Of Memory Cells

Jaydip Guha; Shyam Surthi; Suraj Mathew; Kamal M. Karda; Hung-Ming Tsai

international semiconductor device research symposium | 2001

A dynamic source-drain extension (DSDE) MOSFET using a separately biased conductive spacer

Fernando Gonzalez; Suraj Mathew; J.A. Chediak

Archive | 2010

Gate Constructions Of Recessed Access Devices And Methods Of Forming Gate Constructions Of Recessed Access Devices

Suraj Mathew; Jaydip Guha

Archive | 2002

Sacrificial deposition layer as screening material for implants into a wafer during the manufacture of a semiconductor device

Fawad Ahmed; Jigish D. Trivedi; Suraj Mathew

Archive | 2004

Method to fabricate surface p-channel CMOS

Suraj Mathew; Jigish D. Trivedi

Archive | 2013

Methods Of Forming A Vertical Transistor And At Least A Conductive Line Electrically Coupled Therewith

Jaydip Guha; Shyam Surthi; Suraj Mathew; Kamal M. Karda; Hung-Ming Tsai

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Jigish D. Trivedi

Micron Technology

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Kunal R. Parekh

Micron Technology

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Jaydip Guha

Micron Technology

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Kamal M. Karda

Micron Technology

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Shyam Surthi

Micron Technology

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David K. Hwang

Micron Technology

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Greg Peterson

Micron Technology

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Hung-Ming Tsai

Micron Technology

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Michael Willett

Micron Technology

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John K. Zahurak

Micron Technology

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