Jingook Kim

Signal Integrity Design for High-Speed Digital Circuits: Progress and Directions

This paper reviews recent progress and future directions of signal integrity design for high-speed digital circuits, focusing on four areas: signal propagation on transmission lines, discontinuity modeling and characterization, measurement techniques, and link-path design and analysis.

A

This paper demonstrates a new polar transmitter architecture, which uses the digitized envelope signal to control the drain voltage of a switching mode power amplifier (PA). It is based on a novel polar modulation using the constant envelope modulated signal. Among the various constant envelope modulators, the DeltaSigma modulator is chosen for its noise-shaping characteristic. It enables the use of a highly efficient switching amplifier with high linearity. For demonstration, the overall transmitter is implemented and tested with a code-division multiple-access IS-95A signal. The class-D and class-F amplifiers are designed and compared for the optimum operation. The experimental results show that the amplifier with small device size is suitable for this application because of the fast switching requirement. For the class-F amplifier, the measured power-added efficiency is 51.7% at 22.1 dBm and the overall efficiency (considering the amplified quantization noise) is 31%. The adjacent channel power ratios at 885 kHz and 1.98 MHz are lower than -44.9 and -55.6 dBc at the output power range from 10.8 to 22.1 dBm without any pre-distortion techniques. The overall efficiency is improved to 48.6% with a three-level quantized DeltaSigma modulator. The results clearly show that the highly efficient switching mode PA can be controlled efficiently using a digital signal from the DeltaSigma envelope modulation technique.

\Delta\Sigma

The signal via is a heavily utilized interconnection structure in high-density System-on-Package (SoP) substrates and printed circuit boards (PCBs). Vias facilitate complicated routings in these multilayer structures. Significant simultaneous switching noise (SSN) coupling occurs through the signal via transition when the signal via suffers return current interruption caused by reference plane exchange. The coupled SSN decreases noise and timing margins of digital and analog circuits, resulting in reduction of achievable jitter performance, bit error ratio (BER), and system reliability. We introduce a modeling method to estimate SSN coupling based on a balanced transmission line matrix (TLM) method. The proposed modeling method is successfully verified by a series of time-domain and frequency-domain measurements of several via transition structures. First, it is clearly verified that SSN coupling causes considerable clock waveform distortion, increases jitter and noise, and reduces margins in pseudorandom bit sequence (PRBS) eye patterns. We also note that the major frequency spectrum component of the coupled noise is one of the plane pair resonance frequencies in the PCB power/ground pair. Furthermore, we demonstrate that the amount of SSN noise coupling is strongly dependent not only on the position of the signal via, but also on the layer configuration of the multilayer PCB. Finally, we have successfully proposed and confirmed a design methodology to minimize the SSN coupling based on an optimal via positioning approach

-Digitized Polar RF Transmitter

In this paper, we propose the concept and design methodology for a resonant reactive shield for the reduction of magnetic field leakage from a wireless power transfer (WPT) systems. By using LC resonance, the reactive shield can generate a cancelling magnetic field to reduce the incident magnetic field from WPT coils and effectively reduce the total magnetic field without consuming additional power. The shielding effectiveness of the resonant reactive shield and its effect on WPT efficiency are analyzed with simulation and measurements. For practical application to wirelessly charged electric vehicles, an automatic tuning system for the resonant reactive shield is also proposed and implemented. The effectiveness of a resonant reactive shielding is verified by experiments in a wirelessly charged electric bus.

Modeling and measurement of simultaneous switching noise coupling through signal via transition

As layout density increases in highly integrated multilayer printed circuit boards (PCBs), the noise that exists in the power distribution network (PDN) is increasingly coupled to the signal traces, and precise modeling to describe the coupling phenomenon becomes necessary. This paper presents a model to describe noise coupling between the power/ground planes and signal traces in multilayer systems. An analytical model for the coupling has been successfully derived, and the coupling mechanism was rigorously analyzed and clarified. Wave equations for a signal trace with power/ground noise were solved by imposing boundary conditions. Measurements in both the frequency and time domains have been conducted to confirm the validity of the proposed model.

Design and Analysis of a Resonant Reactive Shield for a Wireless Power Electric Vehicle

A systematic approach for inductance extraction for via arrays between two parallel planes is presented. Both self and mutual inductance values are obtained based on a cavity model. The physics associated with the via inductances is analyzed, and a rigorous method is developed to derive an equivalent total inductance for multiple via arrays. Analytical equations for the equivalent total inductance are derived in closed forms for simple cases. The proposed method is corroborated with measurements, and application of the method for power distribution network designs is demonstrated.

Analysis of noise coupling from a power distribution network to signal traces in high-speed multilayer printed circuit boards

Power/ground partitioning has been used to supply multivoltage levels and to isolate power/ground noise in high-speed multilayer printed circuit boards. However, the partitioning of the power/ground plane breaks the current return path of the signal current through either the power plane or the ground plane, which causes undesired effects such as signal distortion, crosstalk, and radiation. To control and suppress these undesired effects, we should understand the electromagnetic mechanism associated with them. In this paper, the mechanism of the reflection and the transmission of the signal by the slotted power/ground plane is well understood through an analysis of measurements based on time-domain reflectometry. Considering the propagation of a slot wave through the slot line on the power/ground plane, we have successfully explained the changes of the transmitted and reflected waveforms. Furthermore, we have numerically and experimentally investigated the effects of the power/ground partitioning on the radiated emission in various structures. Finally, it is confirmed that the employment of a stitching capacitor on the power/ground slot suppresses the signal distortion and the radiated emission significantly. When the size and the location of the stitching capacitor are designed, there should be a compromise between the noise isolation and the guarantee of the return current path, with considering the resonance frequencies of planes by the capacitor.

Physics-Based Inductance Extraction for Via Arrays in Parallel Planes for Power Distribution Network Design

A hierarchical power distribution network (PDN) consists of chip, package, and printed circuit board (PCB) level PDNs, as well as various structures such as via, ball, and wire bond interconnections, which connect the different level PDNs. When estimating the simultaneous switching noise (SSN) generation and evaluating PDN designs, PDN impedance calculation is an efficient criterion. In this paper, we introduce two new kinds of modeling approaches that are exceptionally suited to improving the accuracy of the PDN impedance estimation, especially for hierarchical PDN. First, we propose a modeling procedure to add an interlevel electromagnetic coupling effect between PDNs of different levels, based on the resonant cavity model and segmentation method. In order to effectively consider the interlevel electromagnetic coupling effect, we introduce a new concept of interlevel PDN, which is, for example, composed of a metal plate in the package-level PDN and a metal plate in the PCB-level PDN. Next, we present a modeling procedure to include the fringing field effect at the edge of small-size PDN structure, which causes a considerable shift of cavity resonance frequencies in the PDN impedance profile. In order to verify the proposed modeling approaches, we have fabricated a series of test vehicles by combining two package-level PDN designs with a PCB-level PDN design. Finally, we have successfully validated the proposed modeling approaches with a series of frequency-domain measurements in a frequency range up to 5 GHz.

Effects on signal integrity and radiated emission by split reference plane on high-speed multilayer printed circuit boards

In power distribution network (PDN) modeling, interconnection inductance can play a critical role. It often determines the effectiveness of a component, such as a decoupling capacitor. This paper studies a typical one-plane-pair PDN structure with parallel power and ground planes and vertical vias in between. This work improves the conventional lumped circuit model for the PDN by introducing a model for the inductance of each via that is frequency-dependent. This frequency dependency is obtained from a rigorous cavity model formulation. The improved lumped circuit model is validated with the cavity model and the HFSS full-wave model. Further, the frequency-dependent mutual inductance between two vias can have either a positive or a negative value depending on via locations in the PDN structure, which is an interesting property that has not been reported.

Modeling and Measurement of Interlevel Electromagnetic Coupling and Fringing Effect in a Hierarchical Power Distribution Network Using Segmentation Method With Resonant Cavity Model

Closed-form expressions for transient power distribution network (PDN) noise caused by an IC switching current are derived for a PDN structure comprised of traces with decoupling capacitors. Criteria for identifying a dominant decoupling capacitor for an impulse switching current are also proposed. The derived PDN noise expressions are validated with measurements of currents at both local and bulk capacitors, the PDN impedance, and the total voltage noise in an operating consumer device.