Jinwoo Noh

RRAM-based synapse for neuromorphic system with pattern recognition function

Feasibility of a high speed pattern recognition system using 1k-bit cross-point synaptic RRAM array and CMOS-based neuron chip has been experimentally demonstrated. Learning capability of a neuromorphic system comprising RRAM synapses and CMOS neurons has been confirmed experimentally, for the first time.

Electronic system with memristive synapses for pattern recognition

Memristive synapses, the most promising passive devices for synaptic interconnections in artificial neural networks, are the driving force behind recent research on hardware neural networks. Despite significant efforts to utilize memristive synapses, progress to date has only shown the possibility of building a neural network system that can classify simple image patterns. In this article, we report a high-density cross-point memristive synapse array with improved synaptic characteristics. The proposed PCMO-based memristive synapse exhibits the necessary gradual and symmetrical conductance changes, and has been successfully adapted to a neural network system. The system learns, and later recognizes, the human thought pattern corresponding to three vowels, i.e. /a /, /i /, and /u/, using electroencephalography signals generated while a subject imagines speaking vowels. Our successful demonstration of a neural network system for EEG pattern recognition is likely to intrigue many researchers and stimulate a new research direction.

Nanoscale RRAM-based synaptic electronics: toward a neuromorphic computing device

Efforts to develop scalable learning algorithms for implementation of networks of spiking neurons in silicon have been hindered by the considerable footprints of learning circuits, which grow as the number of synapses increases. Recent developments in nanotechnologies provide an extremely compact device with low-power consumption.In particular, nanoscale resistive switching devices (resistive random-access memory (RRAM)) are regarded as a promising solution for implementation of biological synapses due to their nanoscale dimensions, capacity to store multiple bits and the low energy required to operate distinct states. In this paper, we report the fabrication, modeling and implementation of nanoscale RRAM with multi-level storage capability for an electronic synapse device. In addition, we first experimentally demonstrate the learning capabilities and predictable performance by a neuromorphic circuit composed of a nanoscale 1 kbit RRAM cross-point array of synapses and complementary metal-oxide-semiconductor neuron circuits. These developments open up possibilities for the development of ubiquitous ultra-dense, ultra-low-power cognitive computers.

Neuromorphic speech systems using advanced ReRAM-based synapse

We demonstrate an advanced ReRAM based analog artificial synapse for neuromorphic systems. Nitrogen doped TiN/PCMO based artificial synapse is proposed to improve the performance and reliability of the neuromorphic systems by using simple identical spikes. For the first time, we develop fully unsupervised learning with proposed analog synapses which is illustrated with the help of auditory and electroencephalography (EEG) applications.

Oxide based nanoscale analog synapse device for neural signal recognition system

We report oxide based analog synpase for neuromorphic system. By optimizing redox reaction at the metal/oxide interface, we can obtain stable analog synapse characteristics and wafer scale switching uniformity. We have confirmed the feasibility of neuromorphic hardware system with oxide synapse array device which recognizes the electroencephalogram (EEG) signal and rats neural signal.

Development of a Semiempirical Compact Model for DC/AC Cell Operation of

A semiempirical model that can simulate dc and pulse (ac) characteristics of filament-type HfOx-based resistance change random access memory (ReRAM) devices has been developed. Time-dependent device characteristics, because of the dynamic change in the filament size, were emulated using a modified ion migration model. This model describes the difference between SET and RESET operations using a current crowding effect This model is a semiempirical model that can simultaneously match both dc and ac characteristics of HfOx-based ReRAM devices.

{\rm HfO}_{\rm{x}}

We propose a redox-based tunable memristive device for neuromorphic applications. First, we report the implementation of a 150 nm Pt/TiNx/Pr0.7Ca0.3MnO3(PCMO)/Pt memristive device with multi-level storage capability for use as an electronic synapse. In addition, we investigate the tunable memristive characteristics on Schottky barrier modulation. The Schottky barrier was formed by the interface between a TiNx electrode and a p-type PCMO. By changing the nitrogen gas flow during the reactive sputter deposition of the TiNx electrode, we have successfully engineered the Schottky barrier height, resulting in the modulation of the current and demonstrating the feasibility of tunable electronic synapses.

-Based ReRAMs

Strong demand for power reduction in state-of-the-art semiconductor devices calls for novel devices and architectures. Since ternary logic architecture can perform the same function as binary logic architecture with a much lower device density and higher information density, a switch device suitable for the ternary logic has been pursued for several decades. However, a single device that satisfies all the requirements for ternary logic architecture has not been demonstrated. We demonstrated a ternary graphene field-effect transistor (TGFET), showing three discrete current states in one device. The ternary function was achieved by introducing a metal strip to the middle of graphene channel, which created an N-P-N or P-N-P doping pattern depending on the work function of the metal. In addition, a standard ternary inverter working at room temperature has been achieved by modulating the work function of the metal in a graphene channel. The feasibility of a ternary inverter indicates that a general ternary logic architecture can be realized using complementary TGFETs. This breakthrough will provide a key stepping-stone for an extreme-low-power computing technology.

A nitrogen-treated memristive device for tunable electronic synapses

The capacitor dielectric dispersion characteristic has become an important design parameter, because the effective dielectric constant of a high-k dielectric significantly changes at high frequencies. However, current methods for capacitance measurement have limitations in the measurement range or the test complexity. In this letter, a new method to measure the dispersion characteristics at a wider frequency region was demonstrated using time-domain reflectometry. Using this method, the dispersion characteristics can be obtained from 200 kHz to 70 MHz without using any complex test structure or compensation procedure.

Demonstration of Complementary Ternary Graphene Field-Effect Transistors

The graphene barristor is a promising device enabling high on-off ratio switching over 105 using a graphene FET. In this work, a semi-empirical device model for the graphene barristor has been developed using the physical parameters extracted from the graphene barristors fabricated on a lightly doped silicon substrate. Then, the ultimate performance limit and benefits of barristors were explored by varying the device parameters. The barristor showed a promising performance, but the scalability requires a creative solution for the device structure to maximize the current injection area.