Jun-Woo Jang
Pohang University of Science and Technology
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Publication
Featured researches published by Jun-Woo Jang.
IEEE Transactions on Electron Devices | 2015
Geoffrey W. Burr; Robert M. Shelby; Severin Sidler; Carmelo di Nolfo; Jun-Woo Jang; Irem Boybat; Rohit S. Shenoy; Pritish Narayanan; Kumar Virwani; Emanuele U. Giacometti; B. N. Kurdi; Hyunsang Hwang
Using 2 phase-change memory (PCM) devices per synapse, a 3-layer perceptron network with 164,885 synapses is trained on a subset (5000 examples) of the MNIST database of handwritten digits using a backpropagation variant suitable for NVM+selector crossbar arrays, obtaining a training (generalization) accuracy of 82.2% (82.9%). Using a neural network (NN) simulator matched to the experimental demonstrator, extensive tolerancing is performed with respect to NVM variability, yield, and the stochasticity, linearity and asymmetry of NVM-conductance response.
international electron devices meeting | 2012
Sangsu Park; H. Kim; M. Choo; Jinwoo Noh; Ahmad Muqeem Sheri; Seungjae Jung; K. Seo; Jubong Park; Seonghyun Kim; Wootae Lee; Jungho Shin; Daeseok Lee; Godeuni Choi; Jiyong Woo; Euijun Cha; Jun-Woo Jang; C. Park; Moongu Jeon; Boreom Lee; Byeong Ha Lee; Hyunsang Hwang
Feasibility of a high speed pattern recognition system using 1k-bit cross-point synaptic RRAM array and CMOS-based neuron chip has been experimentally demonstrated. Learning capability of a neuromorphic system comprising RRAM synapses and CMOS neurons has been confirmed experimentally, for the first time.
international electron devices meeting | 2014
Geoffrey W. Burr; Robert M. Shelby; C. di Nolfo; Jun-Woo Jang; R. S. Shenoy; Pritish Narayanan; Kumar Virwani; E.U. Giacometti; B. N. Kurdi; Hyunsang Hwang
Using two phase-change memory devices per synapse, a three-layer perceptron network with 164 885 synapses is trained on a subset (5000 examples) of the MNIST database of handwritten digits using a backpropagation variant suitable for nonvolatile memory (NVM) + selector crossbar arrays, obtaining a training (generalization) accuracy of 82.2% (82.9%). Using a neural network simulator matched to the experimental demonstrator, extensive tolerancing is performed with respect to NVM variability, yield, and the stochasticity, linearity, and asymmetry of the NVM-conductance response. We show that a bidirectional NVM with a symmetric, linear conductance response of high dynamic range is capable of delivering the same high classification accuracies on this problem as a conventional, software-based implementation of this same network.
international electron devices meeting | 2013
Sangsu Park; Ahmad Muqeem Sheri; JongWon Kim; Jinwoo Noh; Jun-Woo Jang; Moongu Jeon; Boreom Lee; B. R. Lee; Byeong Ha Lee; Hyunsang Hwang
We demonstrate an advanced ReRAM based analog artificial synapse for neuromorphic systems. Nitrogen doped TiN/PCMO based artificial synapse is proposed to improve the performance and reliability of the neuromorphic systems by using simple identical spikes. For the first time, we develop fully unsupervised learning with proposed analog synapses which is illustrated with the help of auditory and electroencephalography (EEG) applications.
IEEE Electron Device Letters | 2015
Jun-Woo Jang; Sangsu Park; Geoffrey W. Burr; Hyunsang Hwang; Yoon-Ha Jeong
The optimization of conductance change behavior in synaptic devices based on analog resistive memory is studied for the use in neuromorphic systems. Resistive memory based on Pr1-xCaxMnO3 (PCMO) is applied to a neural network application (classification of Modified National Institute of Standards and Technology handwritten digits using a multilayer perceptron trained with backpropagation) under a wide variety of simulated conductance change behaviors. Linear and symmetric conductance changes (e.g., self-similar response during both increasing and decreasing device conductance) are shown to offer the highest classification accuracies. Further improvements can be obtained using nonidentical training pulses, at the cost of requiring measurement of individual conductance during training. Such a system can be expected to achieve, with our existing PCMO-based synaptic devices, a generalization accuracy on a previously-unseen test set of 90.55%. These results are promising for hardware demonstration of high neuromorphic accuracies using existing synaptic devices.
international electron devices meeting | 2015
Daeseok Lee; Jaesung Park; Kibong Moon; Jun-Woo Jang; Sangsu Park; Myonglae Chu; Jongin Kim; Jinwoo Noh; Moongu Jeon; Byoung Hun Lee; Boreom Lee; Byung-Geun Lee; Hyunsang Hwang
We report oxide based analog synpase for neuromorphic system. By optimizing redox reaction at the metal/oxide interface, we can obtain stable analog synapse characteristics and wafer scale switching uniformity. We have confirmed the feasibility of neuromorphic hardware system with oxide synapse array device which recognizes the electroencephalogram (EEG) signal and rats neural signal.
international symposium on circuits and systems | 2014
Jun-Woo Jang; Sangsu Park; Yoon-Ha Jeong; Hyunsang Hwang
To compete with nonvolatile FLASH memory technology, we need to develop stackable, cross-point ReRAM device. Although various materials have been reported, it is difficult to meet device criteria such as high speed operation, low power switching, switching uniformity, endurance, long-term retention and selection device for cross-point array. We have investigated various ReRAM devices to meet the nonvolatile memory requirements. We developed wafer scale PCMO-ReRAM devices which exhibit excellent switching uniformity and analog memory behavior. Using PCMO-ReRAM, we can implement analog artificial synapse characteristics for neuromorphic systems. We demonstrated the optimum ReRAM synapse characteristics which are suitable for the neuromorphic application. We compared the time series prediction and face recognition function with varying potentiation and depression characteristics of ReRAM synapse.
Nanotechnology | 2014
Kibong Moon; Sangsu Park; Jun-Woo Jang; Daeseok Lee; Jiyong Woo; Euijun Cha; Sangheon Lee; Jaesung Park; Jeonghwan Song; Yunmo Koo; Hyunsang Hwang
We have investigated the analogue memory characteristics of an oxide-based resistive-switching device under an electrical pulse to mimic biological spike-timing-dependent plasticity synapse characteristics. As a synaptic device, a TiN/Pr0.7Ca0.3MnO3-based resistive-switching device exhibiting excellent analogue memory characteristics was used to control the synaptic weight by applying various pulse amplitudes and cycles. Furthermore, potentiation and depression characteristics with the same spikes can be achieved by applying negative and positive pulses, respectively. By adopting complementary metal-oxide-semiconductor devices as neurons and TiN/PCMO devices as synapses, we implemented neuromorphic hardware that mimics associative memory characteristics in real time for the first time. Owing to their excellent scalability, resistive-switching devices, shows promise for future high-density neuromorphic applications.
symposium on vlsi technology | 2016
Kibong Moon; Euijun Cha; Daeseok Lee; Jun-Woo Jang; Jaesung Park; Hyunsang Hwang
We report nanoscale oxide based analog synpase device and Insulator-Metal-Transition (IMT) oscillator neuron device for neuromorphic system [1,2]. By controlling the redox reaction at Metal/Pr0.7Ca0.3MnO3 (PCMO) interface, we can control synapse characteristics such as switching uniformity, disturbance, retention and multi-level data storage under identical pulse condition. Among various metal electrodes, we found that Mo electrode shows the best data retention characteristics. Using IMT characteristics of NbO2 film, we developed IMT oscillator for neuron application. We have experimentally confirmed the realization of pattern recognition with high accuracy using the Mo/PCMO synapse array and NbO2 oscillator neuron.
IEEE Transactions on Electron Devices | 2016
Jun-Woo Jang; Behnoush Attarimashalkoubeh; Amit Prakash; Hyunsang Hwang; Yoon-Ha Jeong
A novel neuron circuit using a Cu/Ti/Al2O3-based conductive-bridge random access memory (CBRAM) device for hardware neural networks that utilize nonvolatile memories as synaptic weights is introduced. The neuronal operations are designed and proved using SPICE simulations with a Verilog-A device model based on the measured characteristics of the CBRAM device. The applicability of the neuron is demonstrated by constructing a neural network system and applying it to pattern reconstructions that can recall the original patterns from noisy patterns. With these CBRAM-based neurons, a reduction in the area and power of neuromorphic chips is expected in comparison with CMOS-only neuron implementations.