Johann Cervenka

Interface traps density-of-states as a vital component for hot-carrier degradation modeling

We refine our approach for hot-carrier degradation modeling based on a thorough evaluation of the carrier energy distribution by means of a full-band Monte–Carlo simulator. The model is extended to describe the linear current degradation over a wide range of operation conditions. For this purpose we employ two types of interface states, either created by single- or by multiple-electron processes. These traps apparently have different densities of states which is important to consider when calculating the charges stored in these traps. By calibrating the model to represent the degradation of the transfer characteristics, we extract the number of particles trapped by both types of interface traps. We find that traps created by the single- and multiple-electron mechanisms are differently distributed over energy with the latter shifted toward higher energies. This concept allows for an accurate representation of the degradation of the transistor transfer characteristics.

A Comprehensive TCAD Approach for Assessing Electromigration Reliability of Modern Interconnects

The demanding task of assessing long-time interconnect reliability can only be achieved by combination of experimental and technology computer-aided design (TCAD) methods. The basis for a TCAD tool is a sophisticated physical model which takes into account the microstructural characteristics of copper. In this paper, a general electromigration model is presented with special focus on the influence of grain boundaries and mechanical stress. The possible calibration and usage scenarios of electromigration tools are discussed. The physical soundness of the model is proved by 3-D simulations of typical dual-damascene structures used in accelerated electromigration testing.

Hot-carrier degradation modeling using full-band Monte-Carlo simulations

We propose and verify a model for hot carrier degradation based on the exhaustive evaluation of the energy distribution function for charge carriers in the channel by means of a full-band Monte-Carlo device simulator. This approach allows us to capture the interplay between “hot” and “colder” electrons and their contribution to the damage build-up. In fact, particles characterized by higher energy are able to produce interface traps by a single-carrier process while colder ones trigger multivibrational mode excitation of a Si-H bond. For the model validation we use long-channel MOSFETs and represent the degradation of the linear drain current. The single-carrier component dominates degradation (this is the usual tendency for long devices), however, the multiple-carrier process is still considerable being less and less pronounced as the source-drain stress voltage increases

Anisotropic Mesh Refinement for the Simulation of Three-Dimensional Semiconductor Manufacturing Processes

This paper presents an anisotropic adaptation strategy for three-dimensional unstructured tetrahedral meshes, which allows us to produce thin mostly anisotropic layers at the outside margin, i.e., the skin of an arbitrary meshed simulation domain. An essential task for any modern algorithm in the finite-element solution of partial differential equations, especially in the field of semiconductor process and device simulation, the major application is to provide appropriate resolution of the partial discretization mesh. The start-up conditions for semiconductor process and device simulations claim an initial mesh preparation that is performed by so-called Laplace refinement. The basic idea is to solve Laplaces equation on an initial coarse mesh with Dirichlet boundary conditions. Afterward, the gradient field is used to form an anisotropic metric that allows to refine the initial mesh based on tetrahedral bisection

A simulator for local anodic oxidation of silicon surfaces

Models for the local anodic oxidation of silicon using scanning tunneling microscopy and non-contact atomic force microscopy are implemented in a generic process simulator, using the Level Set method. The advantage of the presented implementation is the ease with which further processing steps can be simulated in the same environment. An empirical model for the width of the oxide when using scanning tunneling microscopy is also presented and implemented with the simulator. An oxide dot is simulated for both processes, with a height of 1nm and widths of 5.6nm and 85nm, respectively. The simulator allows for a Gaussian or Lorentzian profile for the final surface deformation.

A Study of Boron Implantation into High Ge Content SiGe Alloys

We report an experimental and simulation study for introducing Boron ions into high Ge content relaxed SiGe layers and into Ge wafers. The successful calibration of our Monte Carlo ion implantation simulator for this wide class of materials is demonstrated by comparing the predicted Boron profiles with SIMS data. The larger nuclear and electronic stopping power of the Ge atom is responsible for the trend to shallower profiles with increasing Ge content in SiGe alloys. The generated point defects are estimated by using a modified Kinchin-Pease model. We found that the higher displacement energy in Ge, the stronger backscattering effect, and the smaller energy transfer from the ion to the primary recoil of a collision cascade are mainly responsible for the significantly reduced damage in Ge. Finally the point responses in Si and Ge are presented and the Boron distributions are discussed.

Deterministic Solution of the Discrete Wigner Equation

The Wigner formalism provides a convenient formulation of quantum mechanics in the phase space. Deterministic solutions of the Wigner equation are especially needed for problems where phase space quantities vary over several orders of magnitude and thus can not be resolved by the existing stochastic approaches. However, finite difference schemes have been problematic due to the discretization of the diffusion term in this differential equation. A new approach, which uses an integral formulation of the Wigner equation that avoids the problematic differentiation, is shown here. The results of the deterministic method are compared and validated with solutions of the Schrodinger equation. Furthermore, certain numerical aspects pertaining to the demanded parallel implementation are discussed.

Applicability of Macroscopic Transport Models to Decananometer MOSFETs

We perform a comparative study of various macroscopic transport models against multisubband Monte Carlo (MC) device simulations for decananometer MOSFETs in an ultra-thin body double-gate realization. The transport parameters of the macroscopic models are taken from homogeneous subband MC simulations, thereby implicitly taking surface roughness and quantization effects into account. Our results demonstrate that the drift-diffusion (DD) model predicts accurate drain currents down to channel lengths of about 40 nm but fails to predict the transit frequency below 80 nm. The energy-transport (ET) model, on the other hand, gives good drain currents and transit frequencies down to 80 nm, whereas below 80 nm, the error rapidly increases. The six moments model follows the results of MC simulations down to 30 nm and outperforms the DD and the ET models.

Analysis of worst-case hot-carrier conditions for high voltage transistors based on full-band monte-carlo simulations

Using a physics-based model for hot-carrier degradation we analyze the worst-case conditions for long-channel transistors of two types: a relatively low voltage n-MOSFET and a high-voltage p-LDMOS. The key issue in the hot-carrier degradation model is the information about the carrier energetical distribution function which allows us to asses the carrier acceleration integral determining the interface state build-up and which controls the interplay between the single- and multiple-carrier mechanisms of Si-H bond rupture. To analyze the worst-case conditions we generate intensity maps, i.e. dependences of some crucial quantities on source-drain Vds and gate Vgs stress voltage. These quantities are the boundary of the high-energy tail of the energy distribution function, the interface state generation rate and the total dose of degradation. The difference between positions of severest degradation spots evaluated according different criteria is also plotted as a function of stress voltages. Using these maps we demonstrate that the worst-case conditions are realized at 0.4Vds < Vgs < 0.5Vds for the n-MOSFET and at the maximal gate current for p-LDMOS. These findings correspond to experimental results published in the literature.

Strained MOSFETs on ordered SiGe dots

The potential of strained DOTFET technology is demonstrated. This technology uses a SiGe island as a stressor for a Si capping layer, into which the transistor channel is integrated. The structure information is extracted from AFM measurements of fabricated samples. Strain on the upper surface of a 30 nm thick Si layer is in the range of 0.7%, as supported by finite element calculations. The Ge content in the SiGe island is 30% on average, showing an increase towards the top of the island. Based on realistic structure information, three-dimensional strain profiles are calculated and device simulations are performed. Up to 15% enhancement of the NMOS saturation current is predicted.