Jong-Won Yoo

A differential method for analysis of hot-electron degradation in floating-gate memory cells with a single-trap resolution

A new differential method for the precise analysis of hot-electron degradation in the floating-gate memory cells with a single-trap resolution is described. The method is based on the use of a test structure, containing two cells with a shared floating gate.

Optimization of programming conditions and endurance enhancement of SuperFlash® memory

A high-efficient endurance enhancement method for the 3rd-generation SuperFlash® memory has been developed and implemented. It is based on the use of a two-step program operation with reduced programming voltage in the first step (pre-programming). Weak pre-programming provides the reduction of the peak lateral electric field in the channel at the beginning of program operation, which reduces gate oxide degradation in the hot electron injection area. Additional improvement of endurance and memory operating performance can be achieved by the reduction of programming time compensated by insignificant increase of programming voltage. Faster programming delivers lower write energy consumption and higher program-disturb immunity. Program/erase cycling with optimized programming conditions demonstrates typical endurance more than 10 million cycles.