Jong-wook Lee

Laser-induced Epitaxial Growth (LEG) Technology for High Density 3-D Stacked Memory with High Productivity

LEG (laser-induced epitaxial growth) process has been proposed to obtain the single c-Si layer over oxide and successfully demonstrated with cell-stacked high density SRAM. With LEG process, the energy density of laser beam and the seed formation are the key factors to determine the crystal quality of Si layer on oxide. CMOSFETs on Si film prepared by LEG process have excellent behaviors in terms of both performance and its variations. It is found that high density LEG SRAMs with stacked cell transistor have fully worked with the lowest stand-by current of less than 0.3 uA/Mb to date. LEG process is believed to be a promising technology for providing the high quality Si channel layer to the stacked memory devices.

1 Giga bit SOI DRAM with fully bulk compatible process and body-contacted SOI MOSFET structure

1 Gbit SOI DRAM with a body-contacted (BC) SOI MOSFET structure is successfully realized for the first time. The fabricated 1G SOI DRAM has fully compatible process with 0.17 /spl mu/m bulk CMOS technology except for the isolation process. The key advantage of BC-SOI MOSFET is freedom from the floating-body effect, since the body-potential increase can be suppressed by the well contact through the remaining thin-silicon film beneath the field oxide. The BC-SOI structure has several advantages, such as relatively high isolation punchthrough voltage, high drain-to-source breakdown voltage compared with conventional thin-film SOI MOSFETs and small junction capacitance compared with bulk MOSFETs, resulting in high-speed circuit operation.

On the MDP-Based Cost Minimization for Video-on-Demand Services in a Heterogeneous Wireless Network with Multihomed Terminals

In this paper, we deal with a cost minimization problem for a multihomed mobile terminal that downloads and plays a video-on-demand (VoD) stream. The cost consists of the users dissatisfaction due to playback disruptions and communication cost for downloading the VoD stream. There are three components in our approach: parameter estimation, threshold adjustment, and threshold compensation. Since we do not assume any a priori knowledge about underlying random variables, necessary parameter values are estimated online. Using the resultant estimates, we formulate the problem as a Markov decision process (MDP) problem considering as if the random variables are exponentially distributed. To solve the MDP problem efficiently, we propose a threshold adjustment algorithm that exploits some structural properties of any optimal solution that are specific to our problem. Finally, to handle the cases where the random variables are not exponentially distributed, we propose a threshold compensation algorithm to compensate for the modeling error. Through extensive simulations, we compare the performance of our scheme with those of static threshold schemes.

Opportunistic downlink data delivery for mobile collaborative communities

With the pervasive deployment of various wireless communication systems, heterogeneous network environments are attracting much attention from academia and industry. Along with the advent of such environments, user devices begin to support multiple network interfaces simultaneously. This opens a possibility for a Mobile Collaborative Community (MCC), a group of people volunteering their resources to assist peer members in communication. In this paper, we present a framework to utilize the wireless spectrum, the most scarce resource of a Mobile Network Operator (MNO), and the energy budget of mobile users in an MCC as efficiently as possible. Then we formulate this problem as static and stochastic optimization problems. Additionally, we propose a fast heuristic algorithm to find a near optimal solution to the considered complex optimization problem. Through extensive simulations, we evaluate how much the proposed scheme is of benefit to the MNO and users in MCC. The performance of our heuristic algorithm and the impacts of various parameters on the performance are also investigated.

Enhanced‐Surface‐Area Packed‐Bed Electrodes for Electrogenerative Oxidation of Sulfur Dioxide

Enhanced-surface-area packed-bed (ESAP) electrodes were designed and tested as anodes for aqueous SO 2 oxidation in electrogenerative SO 2 /O 2 cells. They were prepared by attaching high-area carbon particles, with deposited platinum electrocatalyst, to larger graphite particles. The performance of ESAP electrodes was studied with various SO 2 concentrations (0.01 to 0.9M) in 3M H 2 SO 4 at ca. 25 o C and atmospheric pressure

Secondary Current Distribution in a Curvilinear Hull Cell

The secondary current distribution is calculated for current flow between planar electrodes placed on two radii of an annular section, forming a cell with concentric cylindrical walls. The curved walls are insulators, and there are no variations in the axial direction of the cylindrical coordinate system. The anode is taken to be reversible, and the cathodic reaction-kinetics function is linear. The current distribution is found as a function of geometric ratios and a dimensionless polarization parameter. It is suggested that a cell of this geometry may be used to measure quantitative throwing power as well as to observe qualitative properties of plating-bath solutions.

A new SOI MOSFET for low power applications

SOI devices have attracted a great deal of interest due to their inherent advantages for low power and high performance applications. Assaderaghi et al. proposed the DTMOS (dynamic threshold-voltage MOSFET) for ultra-low voltage VLSI applications (1997). Several researchers proposed a modified SOI MOSFET with the channel body connected to the drain through a small auxiliary MOSFET (Chung et al. 1996; Houston, 1997) to increase the operating voltage. In this paper, we propose a new SOI MOSFET with an auxiliary MOSFET in which the gate and drain are shorted to the gate of the main transistor and the source is connected to the channel body of the main transistor. This auxiliary transistor applies a positive bias to the channel body of the main transistor. In this paper, we present some experimental data and compare the proposed device with a conventional MOSFET, a DTMOS, and the modified SOI MOSFET proposed by Chung et al.

Effects of buried oxide thickness on electrical characteristics of LOCOS-isolated thin-film SOI MOSFETs

It is known that the electrical characteristics of thin-film SOI MOSFETs depend on many physical parameters, such as Si film thickness and process conditions. Several researchers have reported the effects of the buried oxide and its interface on redistribution of boron atoms (Crowder et al. 1993; Park et al. 1995). In this work, we have investigated the stress behaviour in the buried oxide (BOX) interface relative to BOX thickness and its effects on LOCOS-isolated thin-film SOI MOSFET (i.e. both n- and p-MOSFETs) characteristics by experiment and simulation. It was noted that thin-film SOI MOSFETs with a thin BOX show a higher threshold voltage and hole mobility than those with a thick BOX due to the silicon film stress.

Highly Manufacturable Device Isolation Technology Using Laser-Induced Epitaxial Growth for Monolithic Stack Devices

A novel isolation technology using a laser-induced epitaxial growth (LEG) process is proposed to achieve monolithically stacked active silicon without additional thermal budget. The epitaxial behavior in the proposed LEG process can be completely understood by existing models regarding solidification of melted Si. Test devices for electrical characterization were fabricated based on an established 80-nm dynamic random access memory (DRAM) process. The characteristics of DRAM cell transistors with this LEG-processed active silicon are shown to be similar to those with conventional active silicon in terms of both device performances and distributions. Therefore, LEG process is believed to be a promising device isolation technology for monolithic multistack devices.

Hot-carrier degradation behavior in body-contacted SOI nMOSFETs

Hot-carrier degradation in body-contacted silicon-on-insulator (BC SOI) nMOSFETs has been investigated and compared to that in conventional partially-depleted SOI (PD SOI) and bulk nMOSFETs. As compared to PD SOI and bulk nMOSFETs, BC SOI nMOSFETs have a unique degradation-rate coefficient which increases with increasing stress voltage. This is due to the hole injection into gate oxide at the drain junction edge caused by parasitic BJT effect with increasing stress voltage. In this paper, we will present some experimental data and simulation results and discuss hot-carrier degradation mechanism in BC SOI nMOSFETs.