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Dive into the research topics where Pil-Kyu Kang is active.

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Featured researches published by Pil-Kyu Kang.


european solid state device research conference | 2005

High performance device utilizing ultra-thick-strained-Si (UTSS) grown on relaxed SiGe

Sun-Ghil Lee; Young-pil Kim; Young-Eun Lee; Jong-wook Lee; In-Soo Jung; Deok-Hyung Lee; Yong-Hoon Son; Sung-Kwan Kang; Pil-Kyu Kang; Min-Gu Kang; Yu Gyun Shin; U-In Chung; Joo Tae Moon

We demonstrate a highly manufacturable substrate-induced strained Si device, which is compatible with the conventional Si bulk process. It utilizes ultra-thick-strained Si (UTSS) layer thicker than 3000 /spl Aring/ and relaxed SiGe layer with low Ge content less than 10%. The UTSS n-MOSFET gives 6 /spl sim/ 12% increase in I/sub on/ according to the gate length without the cost of increase in I/sub off/. In addition, more than 5% increase in I/sub on/ for p-MOSFET can be obtained by hybrid stress of UTSS and SiGe source/drain process. We also emphasize the importance of the ratio of channel resistance (R/sub CH/) to source-drain resistance (R/sub SD/) for performance enhancement.


Archive | 2009

Methods of fabricating nonvolatile memory devices

Pil-Kyu Kang; Dae-Lok Bae; Jong-wook Lee; Seung-Woo Choi; Yong-Hoon Son; Jong-Hyuk Kang; Jung-Ho Kim


Archive | 2010

Nonvolatile memory devices

Pil-Kyu Kang; Dae-Lok Bae; Jong-wook Lee; Seung-Woo Choi; Yong-Hoon Son; Jong-Hyuk Kang; Jung-Ho Kim


Archive | 2009

Wafer temporary bonding method using silicon direct bonding

Jung-Ho Kim; Dae-Lok Bae; Jong-wook Lee; Seung-Woo Choi; Pil-Kyu Kang


Archive | 2011

CONDUCTIVE LAYER BURIED-TYPE SUBSTRATE, METHOD OF FORMING THE CONDUCTIVE LAYER BURIED-TYPE SUBSTRATE, AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING THE CONDUCTIVE LAYER BURIED-TYPE SUBSTRATE

Pil-Kyu Kang; Gil-heyun Choi; Dae-Lok Bae; Byung-lyul Park; Dong-kak Lee


Archive | 2015

Semiconductor packages, methods of manufacturing the same, and semiconductor package structures including the same

Deok-Young Jung; Pil-Kyu Kang; Byung-lyul Park; Ji-soon Park; Seong-min Son; Jin-ho An; Ji-Hwang Kim


Archive | 2009

STACKED INTEGRATED CIRCUIT PACKAGE FABRICATION METHODS THAT USE VIAS FORMED AND FILLED AFTER STACKING, AND RELATED STACKED INTEGRATED CIRCUIT PACKAGE STRUCTURES

Pil-Kyu Kang; Jung-Ho Kim; Jong-wook Lee; Seung-Woo Choi; Dae-Lok Bae


Archive | 2010

Optical waveguide and coupler apparatus and method of manufacturing the same

Ho-Chul Ji; Kinam Kim; Yong-woo Hyung; Kyoung-won Na; Kyoung-ho Ha; Yoon-dong Park; Dae-Lok Bae; Jin-kwon Bok; Pil-Kyu Kang; Sung-dong Suh; Seong-Gu Kim; Dong-Jae Shin; In-sung Joe


Archive | 2011

Methods of Manufacturing Nonvolatile Memory Devices

Pil-Kyu Kang; Dae-Lok Bae; Jong-wook Lee; Seung-Woo Choi; Yong-Hoon Son; Jong-Hyuk Kang; Jung-Ho Kim


Archive | 2013

Semiconductor devices having through-vias and methods for fabricating the same

Pil-Kyu Kang; Taeyeong Kim; Byung Lyul Park; Jumyong Park; Jin-ho Park; Kyu-Ha Lee; Deok-Young Jung; Gil-heyun Choi

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