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Dive into the research topics where Kathleen A. Stalter is active.

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Featured researches published by Kathleen A. Stalter.


Archive | 2004

Handbook of lead-free solder technology for microelectronic assemblies

Karl J. Puttlitz; Kathleen A. Stalter

Background and Driving Forces. Materials and Manufacturing Considerations. Reliability Considerations.


Archive | 2001

Flip-Chip Die Attach Technology

Peter J. Brofman; Karl J. Puttlitz; Kathleen A. Stalter; Charles G. Woychik

Wire bonds, tape automated bonding (TAB), and solder-bump, flip-chip connections more popularly referred to as controlled collapsed chip connections or C4 are the three primary chip-to-carrier interconnection technologies currently practiced.


electronic components and technology conference | 1999

Low-cost, high reliability flip-chip removal for multi-chip modules

Kathleen A. Stalter; Raymond A. Jackson; David C. Linnell

The prevalent trend to consolidate devices onto multi-chip modules due to electrical performance benefits and printed circuit board real-estate constraints drives the need to have a device replacement technology. The ability to remove and replace devices, for either defective conditions or upgrade level designs, while preserving the electrical integrity and reliability of the other components on the module at various stages of manufacture is essential. It is not a cost-effective option to discard the remaining expensive die or to scrap the fully assembled complex module. The process must also be able to be exercised easily in a development environment where resources are at a minimum, but the learning generated through the ability to perform such operations in-situ is imperative. With the emergence of OEM assembly vendors, this technique and process must also be simple, inexpensive and easy to use, as a company should not be required to invest large resources in remove and replace manufacturing operations.


Archive | 2001

Solder Bump Flip-Chip Replacement Technology on Ceramic Carriers

Karl J. Puttlitz; Kathleen A. Stalter

The industry has focused on replacing packaged chips such as pin-in-hole (PIH) and surface-mount components (SMT) on cards or boards. Components which do not pass electrical test or inspection are removed from cards but not chips from single chip packages. In some instances, such as plastic molded packages, removal is not a viable option.


Archive | 2001

Method of interconnecting electronic components using a plurality of conductive studs

Peter J. Brofman; Sudipta K. Ray; Kathleen A. Stalter


Archive | 1999

Z-axis compressible polymer with fine metal matrix suspension

Peter J. Brofman; John U. Knickerbocker; Sudipta K. Ray; Kathleen A. Stalter


Archive | 2000

Method for enhancing fatigue life of ball grid arrays

Peter J. Brofman; Mark G. Courtney; Shaji Farooq; Mario J. Interrante; Raymond A. Jackson; Gregory B. Martin; Sudipta K. Ray; William E. Sablinski; Kathleen A. Stalter


Archive | 1997

Enhanced ceramic ball grid array using in-situ solder stretch with spring

Peter J. Brofman; Patrick A. Coico; Mark G. Courtney; H. Covell Ii James; Shaji Farooq; Lewis S. Goldmann; Raymond A. Jackson; David C. Linnell; Gregory B. Martin; Frank L. Pompeo; Kathleen A. Stalter; Hilton T. Toy


Archive | 1999

Solder disc connection

Peter J. Brofman; Patrick A. Coico; Mark G. Courtney; Lewis S. Goldmann; Raymond A. Jackson; William E. Sablinski; Kathleen A. Stalter; Hilton T. Toy; Li Wang


Archive | 2001

Process for forming cone shaped solder for chip interconnection

Peter J. Brofman; Shaji Farooq; John U. Knickerbocker; Scott I. Langenthal; Sudipta K. Ray; Kathleen A. Stalter

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