Peter J. Brofman

An advanced multichip module (MCM) for high-performance UNIX servers

In 2001, IBM delivered to the marketplace a high-performance UNIX?®-class eServer based on a four-chip multichip module (MCM) code named Regatta. This MCM supports four POWER4 chips, each with 170 million transistors, which utilize the IBM advanced copper back-end interconnect technology. Each chip is attached to the MCM through 7018 flip-chip solder connections. The MCM, fabricated using the IBM high-performance glass-ceramic technology, features 1.7 million internal copper vias and high-density top-surface contact pad arrays with 100-?µm pads on 200-?µm centers. Interconnections between chips on the MCM and interconnections to the board for power distribution and MCM-to-MCM communication are provided by 190 meters of co-sintered copper wiring. Additionally, the 5100 off-module connections on the bottom side of the MCM are fabricated at a 1-mm pitch and connected to the board through the use of a novel land grid array technology, thus enabling a compact 85-mm ?? 85-mm module footprint that enables 8- to 32-way systems with processors operating at 1.1 GHz or 1.3 GHz. The MCM also incorporates advanced thermal solutions that enable 156 W of cooling per chip. This paper presents a detailed overview of the fabrication, assembly, testing, and reliability qualification of this advanced MCM technology.

Flip-Chip Die Attach Technology

Wire bonds, tape automated bonding (TAB), and solder-bump, flip-chip connections more popularly referred to as controlled collapsed chip connections or C4 are the three primary chip-to-carrier interconnection technologies currently practiced.

Wafer IMS (Injection molded solder) — A new fine pitch solder bumping technology on wafers with solder alloy composition flexibility

In this paper, we will describe a new low cost solder bumping technology for use on wafers. The wafer IMS (injection molded solder) process can form fine pitch solder bumps on wafers, while offering greater solder alloy flexibility. This method is also applicable to form uniform solder bump heights when a wafer has different size and shape of I/O pads. The wafer IMS bumping process uses a solder injection head that melts the desired bulk solder alloy composition and then dispenses the molten solder into resist material cavities on wafers within a nitrogen environment. The injected molten solder contacts and wets to the metal pads without flux, thus forming intermetallic compounds at the solder/pad interface. After stripping the resist material, solder bumps exhibit straight side walls and round tops as the solders have solidified inside the cavities of this resist film. This particular geometry is unique and offers a ready-for-substrate bonding condition without an additional reflow step. In the case of using Cu pillars, one resist material is used for both Cu electroplating and molten solder injection. After patterning the resist material, the Cu pillars are electroplated to the desired height, and the remaining cavities of resist material are filled by the injection of molten solder. The final bump height is defined by the thickness of the resist material. Therefore, any non-uniformity of Cu pillar height across a wafer is masked by the final solder bump uniformity. A prototype tool for wafer IMS bumping technology has been developed and solder bumping has successfully been demonstrated with Sn-3.0Ag-0.5Cu solder on 200mm wafers. The test wafer employed interconnects pads of four different diameters and three different shapes. Other solder compositions have also been tried successfully.

Electrical connections to the thermal conduction modules of the IBM Enterprise System/9000 water-cooled processors

In a complex multichip carrier such as the thermal conduction module (TCM) of IBM high-performance mainframe processors, the interfaces between chips and their substrate as well as between the substrate and its printed circuit board must support a large number of electrical connections. Since chip, substrate, and board typically comprise very different materials, the electrical connections between them must be able to accommodate considerable thermally induced mechanical stress during assembly and use. This paper describes the pin attachment, chip attachment. wire bonding, and laser deletion processes used for forming the electrical connections to theglass-ceramic/copper/polyimide/copper substrate of the thermal conduction modules of the IBM Enterprise System/9000TM watercooled processors.

Delamination mechanisms of thermal interface materials in organic packages during reflow and moisture soaking

A thermal interface material (TIM) is typically a compliant material with high thermal conductivity that is applied between a heat-generating chip and a heat spreader in an electronic package. For a high-conductivity polymeric TIM, the adhesion strength between the TIM and its mating interfaces is typically weak, making the TIM susceptible to degradation when subjected to environmental stresses. At typical chip operating temperatures which are below the curing temperature of the TIM, a compressive force acts on the TIM at the chip center due to the CTE mismatch between the die and the organic chip carrier. Conversely at high BGA(Ball Grid Array) or card-attach reflow temperatures, the TIM center is under tension and the TIM tends to either cohesively separate or adhesively separate from the interfaces. Also, during moisture soaking, such as 85C/85%RH, the organic chip carrier absorbs moisture and expands. The hygroscopic expansion of the organic chip carrier is of the same order of magnitude as the thermal expansion. This expansion reduces the compressive force acting on the TIM, and for certain package constructions, this can lead to degradation of thermal performance. In this paper, the delamination mechanism of a polymer-based thermal interface material in an organic package during reflow and moisture soaking is investigated. The in-situ deformation of the TIM bondline was measured by a digital image correlation (DIC) method on a cross-sectioned part. The TIM bondline deformation was also captured by a digital camera. The coefficients of thermal expansion and hygroscopic expansion for different organic materials were measured, and a finite element analysis of the hygroscopic expansion and TIM bondline deformation was conducted. The affect of T&H stress was analyzed using an equivalent CTE concept.

Polyimide stress cushion for multichip glass-ceramic module packaging

The performance of the IBM glass ceramic-copper multilayer ceramic module (MLC) is significantly enhanced by a revolutionary set of packaging materials. Low dielectric constant cordierite glass ceramic (/spl epsiv/-5.0), co-sintered with high conductivity copper (/spl rho/-3.5 /spl mu//spl Omega/-cm), was developed and integrated into the high performance glass ceramic thermal conduction modules (TCM) used in the IBM System/390-Enterprise system/9000 series of mainframe computers. Low stress pin attach structures have been developed for the glass ceramic module. They include the multilayer thin film I/O pad, taper headed pin and polyimide-cushioned pin structure. All of the approaches were shown to reduce the pin joint stress significantly and, as a consequence, led to the construction of a robust pin joint that is fully compatible with the glass ceramic substrate.

Time, temperature, and mechanical fatigue dependence on underfill adhesion

The observations of the present study show that underfill properties can vary greatly after the initial cure and that these changes can have a significant effect on adhesion. Temperature studies illustrate that underfill adhesion is a strong function of temperature near its glass transition temperature and reveal the importance of adhesion tests at the temperature extremes of the operating conditions and/or reliability thermal cycling tests. Subcritical crack growth results demonstrate that subcritical strain energy release rates do not necessarily scale with critical strain energy release rates. These results are used to create a new adhesion screening methodology that more closely mimics the time, temperature, and mechanical fatigue conditions that an underfilled 1st level package will typically experience.