Kemal Aygun

On-Package Continuous-Time Linear Equalizer using Embedded Passive Components

Multi-gigabit input/output (I/O) links on printed circuit boards (PCBs) suffer from high-frequency signal attenuation, necessitating equalization to restore the transmitted waveforms. Whereas active transmitter or receiver equalization circuits consume significant power, equalizers composed exclusively of passive devices can achieve good signal integrity with no active power dissipation. Recent advances in packaging technology allow passive devices to be integrated directly into the substrate, thereby freeing area in the die or on the motherboard that would otherwise have been needed for the equalizer. In this paper, we are reporting the first, experimental demonstration of continuous-time linear equalizers (CTLEs) using embedded passive components up to 10 gigabit per second (Gbps). We have designed, optimized and fabricated three different equalizers using embedded passives technology. These devices were employed to a equalize board-level interconnect suffering from frequency-dependent loss. We have then validated the performance of the CTLEs in the frequency and time domains.

Microprocessor platform impedance characterization using VTT tools

This paper presents a method to extract the impedance profile of Intel processor platforms in frequency domain using custom, high di/dt electronic loads referred as VTT tools. Although currently followed time domain characterization yields the voltage response of the motherboard (MBD) to the current profile generated by the VTT tool, it does not directly provide the MBD impedance as a function of frequency. Without knowledge of the impedance profile it is difficult to fully understand the impact motherboard layout and decoupling capacitor filter configurations have on the overall power delivery system performance. Theory of the method, VTT tool modifications and platform waveform results discussed. Internally developed computer scripts that process the ratio of the measured voltage and current FFTs as the platform impedance over frequency are described. Correlation of simulation models is provided. Steps towards generalization of the method for maximum industry adoption are identified

Embedded Multi-die Interconnect Bridge (EMIB) -- A High Density, High Bandwidth Packaging Interconnect

The EMIB dense MCP technology is a new packaging paradigm that provides localized high density interconnects between two or more die on an organic package substrate, opening up new opportunities for heterogeneous on-package integration. This paper provides an overview of EMIB architecture and package capabilities. First, EMIB is compared with other approaches for high density interconnects. Some of the inherent advantages of the technology, such as the ability to cost effectively implement high density interconnects without requiring TSVs, and the ability to support the integration of many large die in an area much greater than the typical reticle size limit are highlighted. Next, the overall EMIB architecture envelope is discussed along with its constituent building blocks, the package construction with the embedded bridge, die to package interconnect features. Next, the EMIB assembly process is described at a high level. Finally, high bandwidth signaling between the die is discussed and the link bandwidth envelope is quantified.

Multimode transceiver for high-density interconnects: Measurement and validation

The demand for high-density links is increasing as the trend towards more cost-effective and high-throughput systems continues. Whereas the conventional single-ended and differential signaling schemes need a guaranteed interpair spacing which imposes certain bounds on maximum achievable signaling density, multimode signaling can be utilized to further increase it. In this paper, first, the exacerbated crosstalk caused by highly-coupled lines is illustrated to demonstrate the motivation for multimode signaling. A multimode signaling transceiver is then designed to prove the concept of multimode signaling. The measurement results of the decoded receiver output demonstrate that this scheme is able to reduce the effective crosstalk in a multi-wire link.

An Enhanced Augmented Electric-Field Integral Equation Formulation for Dielectric Objects

A full-wave surface integral equation (SIE) method based on the augmented electric-field integral equation (A-EFIE) for dielectric objects with low-frequency stability is presented in this paper. Motivated by the A-EFIE formulation for perfect electric conductor (PEC), the internal and external problems are both augmented with the current continuity equation and renormalized to eliminate the low-frequency breakdown. Although the magnetic-field integral equation operator K is free of low-frequency breakdown, its matrix form is ill-conditioned and unsolvable if the traditional Rao-Wilton-Glisson (RWG) basis function is used as the testing and basis functions. As a remedy, the Buffa-Christiansen (BC) basis function is introduced to alleviate this testing issue. After this treatment, the matrix form of operator K is well conditioned. To solve problems with a large number of unknowns, a preconditioning scheme is introduced to accelerate the convergence and the mixed-form fast multipole algorithm (FMA) is adopted to accelerate the matrix vector product.

Multimode signaling on non-ideal channels

Simultaneous optimization of interconnect density and crosstalk poses conflicting requirements with conventional differential signaling. As an alternative, we investigate multimode signaling where n signals are transmitted by exciting all fundamental modes on a group of n closely located lines. In this paper, the channel response of multimode signaling is analyzed to demonstrate the benefits of this signaling. The misaligned channel and length mismatch sensitivity of multimode signaling are also analyzed.

Analysis of inter-bundle crosstalk in multimode signaling for high-density interconnects

While the increasing demand for smaller packages and low-cost platforms aggressively drives the interconnect density per unit area, crosstalk noise due to capacitive and inductive coupling limits the achievable interconnect density. As an alternative, we investigate multimode signaling where n signals are transmitted by exciting all fundamental modes on a group of n closely coupled lines called a bundle. Even though crosstalk is ideally zero in a single bundle, practical implementation of this idea for a typical input/output (IO) bus requires multiple closely-placed bundles. Thus, inter-bundle crosstalk may be an issue. In this paper, we analyze the inter-bundle crosstalk starting with the analytical expressions for the modal conversion from one bundle to another. Frequency domain simulations for both frequency-dependent and frequency-independent terminations are performed to compare performance vs. density benefits of multi-bundle multi-mode interconnects to those provided by conventional single-ended and differential signaling.

Embedded capacitors in the next generation processor

Embedded passives technology has been of interest to electronic package designers for performance improvement and package size reduction. With the explosion of mobile phones, tablets and other hand held devices, the need for smaller form factor products with equivalent or better electrical performance makes a very compelling case for embedding passives. The benefits of embedded passives are not limited to small form factor devices. Larger die and server products requiring high performance power delivery solutions can also benefit substantially from embedded capacitors. Intel in collaboration with its suppliers has developed and commercialized a disruptive embedded capacitor technology that provides significant power delivery benefits for high performance computer applications. This is the first commercialized embedded capacitor technology used by Intel.

S-parameter based multimode signaling

As the demands for higher density of interconnects and denser packages are increasing, crosstalk is becoming more important in input/output (I/O) design. Multimode signaling has been investigated for crosstalk cancellation. This paper presents a new scattering parameter (S-parameter) based methodology for multimode signaling. The set of coder/decoder coefficients (CODEC) is obtained from the S-parameters of the whole channel, which makes the scheme more applicable for practical systems. The derived CODEC shows a 20 dB improvement in signal-to-noise ratio and 45% reduction of root mean square (RMS) jitter compared with single-ended signaling for a practical benchmark problem.

Return loss optimization of the microprocessor package vertical interconnect

A geometry based parametric model of a differential high-speed line traversing a ten-layer microprocessor package is developed. This model is used to undertake a detailed study of the effect of the various geometrical parameters on the return loss performance of such a package. The forward problem is solved using a fast, full-wave electromagnetic (EM) solver. The effect of various types of routing in the intermediate layers is examined closely. A sensitivity analysis based on parametric sweeps is carried out to identify the key variables. A hierarchical response surface based optimization is carried out to arrive at an optimum structure. A global optimizer based on simulated annealing is harnessed to find the optimum of non-linear and, in general, non-convex functions. The optimized structure exhibits excellent return loss characteristics translating into higher channel bandwidth.