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Dive into the research topics where Kenichi Shimura is active.

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Featured researches published by Kenichi Shimura.


Applied Physics Letters | 2004

High thermal stability of magnetic tunnel junctions with oxide diffusion barrier layers

Yoshiyuki Fukumoto; Kenichi Shimura; Atsushi Kamijo; Shuichi Tahara; Hiroaki Yoda

We developed two types of magnetic tunnel junctions (MTJs) that showed high thermal stability. One is a PtMn exchange-biased spin-valve MTJ with a CoFe/Al-oxide (AlOx)/NiFe free layer and a CoFeTaOx/CoFe pinned layer, and the other is a pseudo-spin-valve (PSV) MTJ with a CoFe/AlOx/NiFe soft layer, where AlOx and CoFeTaOx act as barriers for Ni and Mn diffusion toward the tunnel barrier, respectively. After 390 °C-1H annealing, the PSV MTJs maintained 28% and the SV MTJs 39% of tunnel magnetoresistance. Transmission electron microscopy observation of the SV MTJs after 380 °C-1H annealing revealed that the migrated Mn atoms were trapped at the CoFeTaOx layer.


asian solid state circuits conference | 2006

A 16-Mb Toggle MRAM With Burst Modes

Tadahiko Sugibayashi; Noboru Sakimura; Takeshi Honda; Kiyokazu Nagahara; Kiyotaka Tsuji; Hideaki Numata; Sadahiko Miura; Kenichi Shimura; Yuko Kato; Shinsaku Saito; Yoshiyuki Fukumoto; Hiroaki Honjo; Tetsuhiro Suzuki; Katsumi Suemitsu; Tomonori Mukai; Kaoru Mori; Ryusuke Nebashi; Shunsuke Fukami; Norikazu Ohshima; Hiromitsu Hada; Nobuyuki Ishiwata; Naoki Kasai; Shuichi Tahara

This paper describes a recently developed 16-Mb toggle magnetic random access memory (MRAM). It has 100-MHz burst modes that are compatible with a pseudo-SRAM even though the toggle cell requires reading and comparing sequences in write modes. To accelerate operating clock frequency, we propose a distributed-driver wide-swing current-mirror scheme, an interleaved and pipelined memory-array group activation scheme, and a noise-insulation switch scheme. These circuit schemes compensate the toggle cell timing overhead in write modes and maintain write-current precision that is essential for the wide operational margin of MRAMs. Because toggle cells are very resistant to write disturbance errors, we designed the 16-Mb MRAM to include a toggle MRAM cell. The MRAM was fabricated with 0.13-mum CMOS and 0.24-mum MRAM processes with five metal layers.


Japanese Journal of Applied Physics | 2008

Magnetic Properties and Writing Characteristics of Magnetic Clad Lines in Magnetoresistive Random Access Memory Devices

Norikazu Ohshima; Kenichi Shimura; Sadahiko Miura; Tetsuhiro Suzuki; Ryusuke Nebashi; Hiromitsu Hada

Structural and magnetic properties of magnetic clad lines used for magnetoresistive random access memory (MRAM) devices were analyzed to optimize the clad-line fabrication process. Patterns of 520 nm lines and 280 nm spaces with a depth of 300 nm with magnetic cladding films of Ta/NiFe/Ta were fabricated to characterize the structure and magnetic properties of cladding films by transmission electron microscopy and magnetic measurements. A high susceptibility with a small hysteresis was obtained when a NiFe cladding film highly oriented to fcc (111) was formed perpendicular to the sidewall depth direction. The optimized cladding film was integrated in MRAM cells and we confirmed that the clad lines reduced the flop current of a toggle-MRAM cell by more than 50% compared with a cell having unclad lines. The flop current distribution can be reduced by applying a magnetic field of 12 kOe in the direction of word lines at room temperature. We successfully confirmed writing operation in a 4-Mbit MRAM cell with these optimized magnetic clad lines.


ieee international magnetics conference | 2006

Magnetic and Writing Properties of Clad Lines Used in a Toggle MRAM

Kenichi Shimura; Norikazu Ohshima; Sadahiko Miura; Ryusuke Nebashi; Toshiyasu Suzuki; Hiromitsu Hada; S. Tahara; Hisanori Aikawa; Tomomasa Ueda; Takeshi Kajiyama; H. Yoda

We fabricated toggle magnetic random access memories with clad writing lines. First, we evaluated the structures and magnetic properties of sputter-deposited cladding layers. The substrate bias during the deposition affected not only the sidewall coverage, but also the crystallinity and magnetic properties of the cladding. The optimized clad lines reduced the writing current to as low as 50% of that of unclad lines. Moreover, the writing current deviation divided by the average current of magnetic tunnel junction cells with clad lines was as low as that with unclad lines. Using the optimized clad lines, we constructed memory arrays with a large operating margin and reduced switching current


Archive | 2008

MAGNETORESISTANCE DEVICE WITH A DIFFUSION BARRIER BETWEEN A CONDUCTOR AND A MAGNETORESISTANCE ELEMENT AND METHOD OF FABRICATING THE SAME

Yoshiyuki Fukumoto; Kenichi Shimura; Atsushi Kamijo


Archive | 2003

Magnetic tunnel magneto-resistance device and magnetic memory using the same

Yoshiyuki Fukumoto; Kenichi Shimura; Atsushi Kamijo


Archive | 2003

Magnetoresistance device and method of fabricating the same

Yoshiyuki Fukumoto; Kenichi Shimura; Atsushi Kamijo


Archive | 2003

Magnetic tunnel device and magnetic memory using same

Yoshiyuki Fukumoto; Kenichi Shimura; Atsushi Kamijo


Archive | 2003

Magnetoresistive device and method for manufacturing same

Kenichi Shimura; Atsushi Kamijo; Yoshiyuki Fukumoto; Kaoru Mori


Archive | 2012

Secondary battery and electrolyte

Daisuke Kawasaki; 川崎 大輔; Kenichi Shimura; 志村 健一; Yoko Hashizume; 洋子 橋詰

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