Kenichiro Sonoda

Analytical device model for submicrometer MOSFET's

A drain current model applicable to deep submicrometer MOSFETs is proposed. This pseudo-two-dimensional device model includes the velocity overshoot effect by using the extended-drift-diffusion (EDD) model. Calculated current-voltage characteristics agree well with the reported experimental data for deep submicrometer MOSFETs. The model is applicable to small-geometry MOSFETs down to L=0.1 mu m, whereas conventional modes without the velocity overshoot are valid to 0.25 mu m. >

Moment expansion approach to calculate impact ionization rate in submicron silicon devices

A method to calculate the impact ionization rate in submicron silicon devices is developed using both an average energy and an average square energy of electrons. The method consists of an impact ionization model formulated with the average energy and conservation equations for the average square energy in the framework of an energy transport model. Parameters for the transport equations are extracted in such a way that calculated moments based on these equations match Monte Carlo simulation results. The impact ionization generation rate in an n+nn+ structure calculated with this method agrees well with the results obtained from Monte Carlo simulation. The new method is also applied to a submicron n‐MOSFET. The calculated distribution of the generation rate is found to be quite different from the results based on a conventional method.

Monte Carlo study of impact ionization phenomena in small geometry MOSFET's

We developed a multi-valley Monte Carlo simulator in which realistic physical parameters based on ab-initio calculations are implemented. A nonlocal impact ionization coefficient in exponentially increasing field is extracted using the Monte Carlo simulator. On the basis of the new nonlocal impact ionization coefficient, an analytical substrate current expression for n-MOSFETs is derived. The new substrate current expression clarifies the reason why a reported theoretical characteristic length used in a pseudo two-dimensional MOSFET model differs from empirically derived ones. The nonlocal impact ionization coefficient implemented in a device simulator demonstrates that the new coefficient can predict substrate current correctly in the framework of the drift diffusion model.<<ETX>>

Electron trap level of hydrogen incorporated nitrogen vacancies in silicon nitride

Hydrogen incorporation into nitrogen vacancies in silicon nitride and its effects on electron trap level are analyzed using simulation based on density functional theory with temperature- and pressure-dependent hydrogen chemical potential. If the silicon dangling bonds around a nitrogen vacancy are well separated each other, hydrogen incorporation is energetically stable up to 900 °C, which is in agreement with the experimentally observed desorption temperature. On the other hand, if the dangling bonds strongly interact, the incorporation is energetically unfavorable even at room temperature because of steric hindrance. An electron trap level caused by a nitrogen vacancy becomes shallow by the hydrogen incorporation. An electron is trapped in a deep level created by a silicon dangling bond before hydrogen incorporation, whereas it is trapped in a shallow level created by an anti-bonding state of a silicon-silicon bond after hydrogen incorporation. The simulation results qualitatively explain the experiment, in which reduced hydrogen content in silicon nitride shows superior charge retention characteristics.

Physical Models for Deep Submicron Device Simulation

An impact ionization model is derived for silicon with anisotropic and nonparabolic band structure. The validity of the model is verified by comparing calculated and experimental results on both impact ionization coefficient and quantum yield. A phenomenological length constant for the extended drift-diffusion model is evaluated using an iterative method based on the Boltzmann transport equation. The length constant increases with applied electric field at low field and flattens out above 30 kV/cm, reaching a saturation value of 400 A.

Comprehensive study on charge trapping property of Si-containing hafnium-oxide polymorph

The electron-trapping property of Hf oxides with a wide range of Si contents (0–64 at. %) is studied as a charge storage layer of a nonvolatile memory. The largest flatband voltage shift in the MOS capacitor is obtained at a Si content of ~20 at. %, which corresponds to the formation of a metastable crystalline phase such as a tetragonal or orthorhombic phase. First-principles calculation reveals that metastable phases tend to have a formation energy of oxygen vacancy lower than that of stable monoclinic ones. A schematic picture of traps in crystalline Hf oxides is provided. The metastable phase is also demonstrated to have retention characteristics superior to other phases.

Analytical Device Model including Velocity Overshoot Effect for Ultra Small MOSFETs

A new analytical device model applicable to deep sub-micron MOSFETs is proposed. The new pseudo two-dimensional model includes velocity overshoot effect by the use of the extended drift-diffusion (EDD) model. Calculated current voltage characterisitcs agree well with the reported device characteristics of deep sub-micron MOSFETs. The model is found to be applicable to small geometry MOSFETs down to L=0.1 μm.

High Soft-Error Tolerance Body-Tied Silicon-on-Insulator Technology with Partial Trench Isolation

This paper presents soft-error tolerance for partially depleted silicon-on-insulator (SOI) devices with partial trench isolation (PTI) that realize a body-tied structure. Mechanism of charge collections due to alpha-particle strikes is clarified for a body-tied SOI device with the PTI structure and a body-floating SOI device. It is estimated that the soft-error tolerance of the body-floating SOI device is lower than that of the body-tied one because of parasitic bipolar action. Soft-error testing by using 0.18 µm 4 Mbit static random-access memory (SRAM) indicates that the body-tied SOI devices with the PTI structure have high soft-error tolerance as compared with bulk devices. The charge collections for the PTI structure are also investigated to mitigate the soft errors. It is demonstrated that the body-tied PTI SOI technology is one of the best solutions for high-performance system LSIs with high soft-error tolerance.

Novel Impact Ionization Model Using Second- and Fourth-Order Moments of Distribution Function for Generalized Moment Conservation Equations

Device degradation caused by hot carriers has been main concern from the reliability point of view. Because secondary-generated carriers created by impact ionization (I.I.) have great influence on the degradation of gate oxide, accurate modeling of I.I. is necessary. We propose an I.I. model which is formulated using second- and fourth-order moments of distribution function for precise description of I.I. in inhomogeneous electric field. A set of moment conservation equations for carrier transport is also presented to perform practical device simulation with the I.I. model.

Study of a Length Coefficient for an Extended Drift-Diffusion Model for Metal-Oxide-Semiconductor (MOS) Device Simulation

A length coefficient for an extended/augmented drift-diffusion model for device simulation was extracted under an exponentially increasing electric field using a multi-valley-band Monte Carlo simulator. The length coefficient increases with electric field and tends to saturate at 0.026 µm, which is half of the previously reported value [Appl. Phys. Lett. 52 (1988) 141]. It was also shown that the coefficient is independent of the low-field mobility.