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Dive into the research topics where Kheng Chok Tee is active.

Publication


Featured researches published by Kheng Chok Tee.


Electrochemical and Solid State Letters | 2004

Uniform Void-Free Epitaxial CoSi2 Formation on STI Bounded Narrow Si(100) Lines by Template Layer Stress Reduction

C. S. Ho; K. L. Pey; C. H. Tung; B. C. Zhang; Kheng Chok Tee; G. Karunasiri; S. J. Chua

Void free epitaxial-CoSi 2 with nano-thickness has been successfully fabricated on narrow Si(100) substrates surrounded by shallow trench isolation (STI) using a capped titanium mediated epitaxy method. The silicide is epitaxial with a CoSi 2 (110)∥Si(100) crystal orientation. Void growth in the narrow silicon lines under the film edges due to an anomalous creep effect in the presence of a localized tensile stress between CoSi 2 and Si was suppressed completely by optimizing the initial rapid thermal annealing (RTA) thermal budget, and ensuring that no voids nucleated prior to the selective wet clean and second higher-temperature RTA process. The epitaxial Co-silicided n/p metal oxide semiconductor field effect transistors show excellent device performance.


Archive | 2004

Material architecture for the fabrication of low temperature transistor

Chung Foong Tan; J. P. Liu; Hyeokjae Lee; Kheng Chok Tee; Elgin Quek


Archive | 2004

Selective oxide trimming to improve metal T-gate transistor

Timothy Phua; Kheng Chok Tee; Liang Choo Hsia


Archive | 1998

Area array air gap structure for intermetal dielectric application

Lap Chan; Kheng Chok Tee; Kok Keng Ong; Chin Hwee Seah


Archive | 2003

Device, design and method for a slot in a conductive area

Patrick Tan; Kheng Chok Tee; David Vigar; Tat Wei Chua


Archive | 2001

Method for fabricating void-free epitaxial-CoSi2 with ultra-shallow junctions

Chaw Sing Ho; Kheng Chok Tee; Kin Leong Pey; G. Karunasiri; Soo Jin Chua; Kong Hean Lee; Alex See


Archive | 1999

Formation of low k dielectric

Lap Chan; Cher Liang Cha; Kok Keng Ong; Kheng Chok Tee


Thin Solid Films | 2004

Effect of processing parameters on electroless Cu seed layer properties

Y.C. Ee; Zhong Chen; Lap Chan; Alex See; S. B. Law; Kheng Chok Tee; K.Y. Zeng; Lu Shen


Archive | 2005

Method of forming a partially depleted silicon on insulator (PDSOI) transistor with a pad lock body extension

Yeen Tat Chan; Kheng Chok Tee; Yiang Aun Nga; Zhao Lun; Wang Ling Goh; Diing Shenp Ang


Archive | 2004

Novel method to make corner cross-grid structures in copper metallization

Patrick Tan; Kheng Chok Tee; David Vigar

Collaboration


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Lap Chan

Chartered Semiconductor Manufacturing

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Liang Choo Hsia

Chartered Semiconductor Manufacturing

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Timothy Phua

Chartered Semiconductor Manufacturing

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Alex See

Chartered Semiconductor Manufacturing

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Cher Liang Cha

Chartered Semiconductor Manufacturing

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David Vigar

Chartered Semiconductor Manufacturing

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G. Karunasiri

Chartered Semiconductor Manufacturing

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King Jien Chui

Chartered Semiconductor Manufacturing

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Kok Keng Ong

Chartered Semiconductor Manufacturing

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Patrick Tan

Chartered Semiconductor Manufacturing

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