Kiyomitsu Onodera

Miniaturized millimeter-wave masterslice 3-D MMIC amplifier and mixer

Masterslice three-dimensional MMIC (3-D MMIC) technology has (even in the millimeter-wave region) the advantages of high integration levels, simple design procedures, short turnaround time, and low fabrication cost. This paper clarifies the advantages of the thin-film microstrip line by drawing comparisons to the characteristics of other transmission lines. The simple design procedures of the masterslice 3-D MMIC are elucidated by referring to fabricated MMICs. A V-band amplifier and an image rejection mixer fabricated by using the same master array are demonstrated. The V-band amplifier offers an 8-dB gain and a 5.3-dB noise figure in the area of just 0.27 mm/sup 2/. The image rejection mixer achieves a conversion gain of /spl sim/10 db and an image rejection ratio of 20 db. The performance of the millimeter-wave 3-D MMICs is competitive with those of the conventional planar-formed MMICs.

Extremely low-noise performance of GaAs MESFETs with wide-head T-shaped gate

Fully ion-implanted low-noise GaAs MESFETs with a 0.11-/spl mu/m Au/WSiN T-shaped gate have been successfully developed for applications in monolithic microwave and millimeter-wave integrated circuits (MMICs). In order to reduce the gate resistance, a wide Au gate head made of a first-level interconnect is employed. As the wide gate head results in parasitic capacitance, the relation between the gate head length (L/sub h/) and the device performance is examined. The gate resistance is also precisely calculated using the cold FET technique and Mahon and Anholds method. A current gain cutoff frequency (f/sub T/) and a maximum stable gain (MSG) decrease monotonously as L/sub h/ increases on account of parasitic capacitance. However, the device with L/sub h/ of 1.0 /spl mu/m, which has lower gate resistance than 1.0 /spl Omega/, exhibits a noise figure of 0.78 dB with an associated gain of 8.7 dB at an operating frequency of 26 GHz. The measured noise figure is comparable to that of GaAs-based HEMTs.

High microwave and ultra-low noise performance of fully ion-implanted GaAs MESFETs with Au/WSiN T-shaped gate

Fully ion-implanted n/sup +/ self-aligned GaAs MESFETs with high microwave and ultra-low-noise performance have been fabricated. T-shaped gate structures composed of Au/WSiN are employed to reduce gate resistance effectively. A very thin and high-quality channel with high carrier concentration can be formed by adopting the optimum annealing temperature for the channel, and the channel surface suffers almost no damage by using ECR plasma RIE for gate formation. GaAs MESFETs with a gate length as short as 0.35 mu m demonstrated a maximum oscillation frequency of 76 GHz. At an operating frequency of 18 GHz, a minimum noise figure of 0.81 dB with an associated gain of 7.7 dB is obtained. A K/sub f/ factor of 1.4 estimated by Fukuis noise figure equation, which is comparable to those of AlGaAs/GaAs HEMTs with the same geometry, reveals that the quality of the channel is very high. >

Effects of neutral buried p-layer on high-frequency performance of GaAs MESFETs

Fully ion-implanted n/sup +/ self-aligned GaAs MESFETs with Au/WSiN refractory metal gates have been fabricated by adopting neutral buried p-layers formed by 50-keV Be-implantation. S-parameter measurements and equivalent circuit fittings are discussed. When the Be dose is increased from 2*10/sup 12/ cm/sup -2/ to 4*10/sup 12/ cm/sup -2/, the maximum value of the cutoff frequency with a 0.2- mu m gate falls off from 108 to 78 GHz. This is because a neutral buried player makes the intrinsic gate-source capacitance increase markedly, while its influence on gate-drain capacitance and gate-source fringing capacitance is negligible. The maximum oscillation frequency recovers, however, due primarily to the drain conductance suppression by the higher-concentration buried p-layer. An equivalent value of over 130 GHz has been obtained for both 0.2- mu m-gate GaAs MESFETs. >

Millimeter-wave three-dimensional masterslice MMICS

The three-dimensional (3D) masterslice MMIC technology has, even in the millimeter-wave region, the advantages of high integration levels, simple design procedures, short turn-around-time, and low fabrication cost. Fabricated V-band amplifiers achieve an 8-dB gain and a 5.3 dB noise figure in an area of 0.27 mm/sup 2/. A U-band single-chip downconverter is also demonstrated.The three-dimensional (3D) masterslice MMIC technology has, even in the millimeter-wave region, the advantages of high integration levels, simple design procedures, short turn-around-time, and low fabrication cost. Fabricated V-band amplifiers achieve an 8-dB gain and a 5.3 dB noise figure in an area of 0.27 mm/sup 2/. A U-band single-chip downconverter is also demonstrated.

Folded U-Shaped Microwire Technology for Ultra-Compact Three-Dimensional MMIC's

A microwire technique has been developed for fabricating three-dimensional (3-D) structures for use in ultra-compact GaAs monolithic microwave/millimeter wave integrated circuits (MMIC). By folding metal into a U-shapedl wall and burying it in a relatively thick polyimide insulator, vertical microwires can be made with greatly reduced process complexity. This technique also offers process compatibility with multilevel interconnects. In this paper, the fundamental characteristics of the proposed Ushaped microwire are dkcussed and its applications to 3-D passive elements and circuits are demonstrated. The characteristics of the U-shaped microwires are almost the same as those of I-shaped microwires and can be accurately estimated and designed by using numerical analysis. The fabricated and designed transmission lines are one-half to one-third the size of conventional lines with the same transmission loss, and if the microwire is also used as a shielding wall, the occupied area can be made much smaller. Miniature inductors made of vertical U-shaped microwires exhibit a self-resonance freqnency as high as that of conventional inductors, with one-half the size and offer a great advantage in L- or S-band applications. A fabricated miniature wideband 3-D balun had an insertion loss of 1.5 + 1 dB at frequencies from 10 to 30 GHz, and an amplitude and phase balance of 2 dB and 5/spl deg/, respectively.

Hot-carrier luminescence in sub-quartermicrometer high-speed GaAs MESFET's

Hot-carrier luminescence in high-speed GaAs MESFETs with sub-quartermicrometer gate length was investigated at drain voltages high enough to permit breakdown. The spectral distribution of emitted radiation was analyzed in the energy range of 1.4-2.5 eV. GaAs MESFETs with a gate length of 0.18 /spl mu/m yielded a prominent peak from the direct recombination across a GaAs bandgap of 1.43 eV. At energies above 1.65 eV, a broad continuous spectra with two peaks and a shoulder were detected. The two peaks coincide with the indirect recombination energies between holes in the /spl Gamma/ valley and electrons in the L or X valley. These peaks, however, were diminished at drain voltages as high as 7.5 V. It is suggested that the luminescence at energies above the bandgap mainly arises from the recombination of hot carriers, and the luminescence resulting from a phonon-assisted conduction to conduction-band transition is superimposed on it. The luminescence from the gate Schottky diode at reversed bias was also examined. There were no peaks from the direct recombination across the bandgap in the spectra. The light emission at the bandgap energy under the FET operation probably originates from the recombination of cold channel electrons and hot holes, which are generated by impact ionization and swept toward the source.

Three-Dimensional MMIC Interconnect Process using Photosensitive BCB and STO Capacitors

This paper presents a new three-dimensional (3-D) MMIC interconnect process using photosensitive BCB (Benzocyclobutene) interlevel dielectric and STO (SrTiO3) capacitors. This technology significantly reduces process turn-around-time (TAT) and chip size. It yields MMICs with wide frequency range because the low temperature process can be applied to InGaAs and InP devices as well as GaAs and Si devices. A 50 GHz-band amplifier is fabricated to demonstrate this technology.

V-band monolithic low-noise amplifiers using ion-implanted n/sup +/-self-aligned GaAs MESFETs

V-band monolithic low-noise amplifiers (LNAs) were successfully fabricated using a manufacturable GaAs MESFET process. Ion-implanted n/sup +/-self-aligned GaAs MESFETs, which are used to make digital ICs, were employed. A fabricated single-stage LNA with a 0.13 μm Au/WSiN gate demonstrated a noise figure of 5 dB at 60 GHz with an associated gain of 7 dB. A two-stage LNA achieved a noise figure of 6 dB at 60 GHz with an associated gain of 14 dB. This is the first demonstration of ion-implanted n/sup +/-self-aligned GaAs MESFETs for millimeter-wave monolithic integrated circuits (MIMICs). The results are among the best ever reported for V-band GaAs-MESFET amplifiers.

A double lightly doped drain (D-LDD) structure H-MESFET for MMIC applications

This paper proposes a new double lightly doped drain (D-LDD) structure for InGaP/InGaAs heterostructure MESFETs (H-MESFETs). A D-LDD H-MESFET has three kinds of low-resistant layers in the drain region, while a conventional LDD H-MESFET has two layers. This structure improves maximum stable gain (MSG) accompanied by R/sub d/ reduction with minimized gate-breakdown-voltage degradation and C/sub gd/ increase. A heuristic model is proposed to predict V/sub bgd/ from sheet resistance of implanted layers, and its validity is confirmed with experimental data. This model successfully predicted the tradeoff relation between V/sub bgd/ and parasitic resistance, and it has enough generality so that it can be applied to usual ion-implanted GaAs MESFETs. Consequently, a typical MSG at 50 GHz exhibits 8.9 dB in a MESFET and 7.7 dB S21 in an one-stage amplifier. The high-frequency circuit operation proves that this technology is one of the most promising for monolithic-microwave integrated-circuit (MMIC) applications.