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Featured researches published by Kiyoshi Irino.


symposium on vlsi technology | 2002

Low standby power CMOS with HfO/sub 2/ gate oxide for 100-nm generation

S. Pidin; Yusuke Morisaki; Yoshihiro Sugita; Takayuki Aoyama; Kiyoshi Irino; Tomoji Nakamura; T. Sugii

We have fabricated 55-nm poly-Si gated n- and p-MOSFETs with HfO/sub 2/ gate dielectric of 3-nm physical thickness deposited by atomic layer deposition (ALD). A conventional CMOS process was used with high-temperature S/D anneal of /spl ges/1000/spl deg/C, cobalt-silicide and pocket implants. The devices showed very promising characteristics for low standby power applications due to drastic reduction of gate leakage current.


international electron devices meeting | 2002

Ultra-thin (T eff inv = 1.7 nm) poly-Si-gated SiN/HfO 2 /SiON high-k stack dielectrics with high thermal stability (1050/spl deg/C)

Yusuke Morisaki; Takayuki Aoyama; Yoshihiro Sugita; Kiyoshi Irino; T. Sugii; Tomoji Nakamura

Demonstrated the high-performance and high-reliability of ultra-thin poly-Si-gated SiN/HfO/sub 2//SiON high-k stack dielectrics. A SiN layer deposited on HfO/sub 2/ is shown to be indispensable to the suppression of the reaction of poly-Si and HfO/sub 2/, resulting in high thermal stability (1050/spl deg/C). This thermally stable SiN/HfO/sub 2//SiON structure can achieve an ultrathin oxide thickness of T/sub eff//sup inv/ (effective oxide thickness measured in strong inversion region) for 1.7 nm, which is less than 1 nm for EOT. A low leakage current of 5 to 6 orders of magnitude lower than that of SiO/sub 2/ was observed. In addition, this thermal stability can lead to high reliability, which includes TDDB and hot electron integrity.


symposium on vlsi technology | 1999

High performance and highly reliable deep submicron CMOSFETs using nitrided-oxide

Kiyoshi Irino; Yasuyuki Tamura; Toshiro Nakanishi; M. Shigeno; K.-I. Hikazutani; M. Higashi; Kanetake Takasaki

High performance and highly reliable CMOSFETs have been obtained using newly-developed nitrided-oxide processing, which features the localization of the nitrogen profile at the SiO/sub 2/-Si interface, and giving different nitrogen concentrations between the gate and LDD area. In p-MOSFETs, I/sub on/ can be increased by 12%, and I/sub off/ can be decreased by 50% compared with pure oxide. Also, in n-MOSFETs, hot carrier reliability significantly improves.


Japanese Journal of Applied Physics | 2000

Impact of Nitrogen Profile in Gate Oxynitride on Complementary Metal Oxide Semiconductor Characteristics

Yasuyuki Tamura; Mayumi Shigeno; Satoshi Ohkubo; Kiyoshi Irino; Toshiro Nakanishi; Kanetake Takasaki

We demonstrated that the control of the nitrogen profile in the gate oxynitride for complementary metal oxide semiconductors (CMOSs) is very important. We grew NO or N2O nitrided gate oxide at 800°C or 900°C to prepare three kinds of oxynitrides with different nitrogen profiles, and investigated the atomic configuration and the chemical state of nitrogen using secondary ion mass spectroscopy and X-ray photoelectron spectroscopy. Furthermore, we fabricated CMOS field effect transistors with gate oxide and oxynitride, and evaluated the interface state density and the hot carrier immunity. By systematical investigation of the relationship between the nitrogen profile and the electrical characteristics, we found that the nitrogen in the oxynitride should exist only at the interface for realizing the CMOS devices having high performance and high reliability.


Extended Abstracts of International Workshop on Gate Insulator. IWGI 2001 (IEEE Cat. No.01EX537) | 2001

Effects of interface oxide layer on HfO 2 gate dielectrics [MISFETS]

Yusuke Morisaki; Yoshihiro Sugita; Kiyoshi Irino; Takayuki Aoyama

We report on the nMISFETs (n-type metal-insulator-semiconductor field effect transistors) characteristics for the atomic layer chemical vapor deposition (ALCVD) HfO/sub 2/ gate stack and the behavior of the HfO/sub 2/ layer during annealing on various oxides.


Archive | 2002

Semiconductor device having a high-dielectric gate insulation film and fabrication process thereof

Kiyoshi Irino; Yusuke Morisaki; Yoshihiro Sugita; Yoshiaki Tanida; Yoshihisa Iba


Archive | 2002

Manufacture system for semiconductor device with thin gate insulating film

Kiyoshi Irino; Kenichi Hikazutani; Tatsuya Kawamura; Taro Sugizaki; Satoshi Ohkubo; Toshiro Nakanishi; Kanetake Takasaki


Archive | 1999

Manufacture method and system for semiconductor device with thin gate insulating film of oxynitride

Kiyoshi Irino; Kenichi Hikazutani; Tatsuya Kawamura; Taro Sugizaki; Satoshi Ohkubo; Toshiro Nakanishi; Kanetake Takasaki


Archive | 2003

Manufacture method for semiconductor device with patterned film of ZrO2 or the like

Yoshihiro Sugita; Yusuke Morisaki; Kiyoshi Irino; Shiqin Xiao; Takayuki Ohba


Fujitsu Scientific & Technical Journal | 2003

Impact of Nitrogen Profile in Gate Nitrided-Oxide on Deep-Submicron CMOS Performance and Reliability

Kanetake Takasaki; Kiyoshi Irino; Takayuki Aoyama; Y. Momiyama; Toshiro Nakanishi; Yasuyuki Tamura; Takashi Ito

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