Koichiro Hoh

Incorporation of Oxygen into Silicon during Pulsed-Laser Irradiation

Evidence for the oxygen incorporation into silicon during surface melting by the pulsed-laser irradiation is presented. SIMS measurement of 18O in Si samples which were laser-irradiated in 18O2 atmosphere shows that 18O is introduced in Si with the maximum concentration 7×1020 cm-3 and the penetration depth 1.4 µm. The incorporation of 18O is blocked when the Si surface is covered with SiO2.

Pressure Dependence of Absorption Edge,Luminescence Peak and Raman Frequency in Wolffram's Red Salt

Absorption, luminescence and Raman spectra are studied under high pressure in Wolfframs red salt. It is suggested that the quasi-one-dimensional electron-phonon system is continuously changed by pressure from a moderate coupling state at atmospheric pressure to a weak coupling state, not by decreasing the electron-phonon coupling energy, but by increasing the transfer energy. The decrease of the phonon energy of the symmetric stretching vibration of Cl around Pt IV and the rapid decrease of the energy gap with the pressure increase up to 0.2 GPa are thought because the Pt IV -Cl distance would increase with increasing pressure as the Pt IV -Pt II distance decreases.

A Simple Model of a Single-Electron Floating Dot Memory for Circuit Simulation

A new simulation technique for a single-electron floating dot memory based on a semiclassical single-electron transistor is proposed. It is designed to be suitable for use in circuit simulation and it uses a Monte Carlo method in combination with the master equation. Current-voltage characteristics of the sensing single-electron transistor are modeled on the steady-state master equation. Stochastic charging and discharging of the memory dot is simulated by the Monte Carlo method. Our model is faster than the master equation method alone. In addition, drain current of the transistor can be calculated accurately at every instant in the transient simulation, which is time-consuming with the conventional Monte Carlo method alone.

Circuit Simulators Aiming at Single-Electron Integration.

We have developed two types of single-electron simulators. One is for lower level circuit simulation, denoted as extended single-electron simulator (ESS) and the other is for higher level simulation, denoted as single electron transistor-simulation program with integrated circuit emphasis (SET-SPICE). ESS simulates small-scale arbitrary circuits with precision, performs efficient steady-state analysis besides conventional transient analysis, and visualizes probability distributions. SET-SPICE, on the other hand, simulates large-scale single-electron-transistor circuits with relatively large node capacitances at high speed and performs co-simulation of single electron transistor (SET) and complementary metal oxide semiconductor (CMOS) circuits.

Diffraction effects on pattern replication with synchrotron radiation

With synchrotron radiation from the storage ring ETL–TERAS, the influence of Fresnel diffraction on replicated patterns was investigated. Spatial intensity distributions due to the diffraction were calculated with Fresnel integrals and compared with replicated patterns. Pattern degradation due to the diffraction depends on a parameter UO=W/(Gpλ/2)1/2, where W is the pattern width, Gp the mask‐to‐wafer distance, and λ the wavelength. From the calculation and the experiments it is concluded that the value of U0 is needed to be larger than about three for a satisfactory pattern replication. Work with an experimental stencil mask with patterns of submicron dimensions is also described briefly.

An alignment system for synchrotron radiation x‐ray lithography

We have developed an alignment exposure system for synchrotron radiation (SR) x‐ray lithography. The present system consists of vertical mask and wafer stages, optics for mask‐to‐wafer displacement detection, a feedback control system, and an aluminum chamber containing them. The chamber is filled with He gas in atmospheric pressure and separated by a 25‐μm‐thick Be window from the SR beam line in ultrahigh vacuum. The alignment method is based on an optical‐heterodyne displacement detection using three diffraction gratings. With 1.0‐μm‐period gratings and a He–Ne transverse‐mode Zeeman laser (wavelength=0.6328 μm), alignment precision better than 0.01 μm was achieved. Features and performance of the system are described.

16-Qubit Quantum-Computing Emulation Based on High-Speed Hardware Architecture

A 16-qubit quantum-computing emulator executing quantum algorithms at high speed is proposed. By limiting the command of the quantum computing emulator to the minimum function required with the quantum algorithm, probability amplitudes are expressed with one bit and the functions of many qubits are integrated on a field programmable gate array (FPGA). As a result of implementing the emulator in the FPGA, it is found that the emulator has a 250 times higher-speed as compared with a software simulation by a general-purpose processor.

Electronic Chaos in Silicon Thyristor

Deterministic chaos was observed in the ac response of the Si thyristor in relation to its S-shaped negative differential conductivity. Period-doubling and period-adding chaotic sequences appeared in the same device corresponding to the change of operating parameters. A simple device/circuit model reproduced experimental Lorenz plots qualitatively.

An 8-qubit quantum-circuit processor

Quantum-circuit processor (QCP) is a parallel processor that executes quantum algorithms at a processing speed comparable to a quantum computer. The QCP emulates the quantum superposition, utilizing massive silicon devices in the fractal hardware-architecture. Its design cost is relaxed due to that recursive structure although a huge amount of devices are required for it. In this paper, 8-qubit QCP was fabricated within a programmable logic device. This is the first realization of the 8-qubit-hardware quantum computing as far as we know. A factoring algorithm is demonstrated by using it in this paper.

Single-Electron Transistor in Silicon-on-Insulator with Schottky-Contact Tunnel Barriers

We have proposed a novel single-electron transistor (SET) with Schottky tunnel barriers. The proposed SET can be fabricated by employing the standard salicide process and can be merged in the current CMOS VLSI (complementary metal-oxide-semiconductor-very-large-scale integration). We analyzed its characteristics using the Poisson equation and the master equation based on the semi-classical theory. Calculation results show that the proposed SET has good cutoff characteristics similar to those of conventional MOSFETs (metal-oxide-semiconductor-field-effect transistors) while its gate-periodic characteristics are similar to those of conventional SETs.