Kris Vanstreels

Effect of UV wavelength on the hardening process of porogen-containing and porogen-free ultralow-k plasma-enhanced chemical vapor deposition dielectricsa)

The effect of narrow-band 172 nm and broad-band >200u2002nm UV sources in the new curing scheme of the plasma-enhanced chemical vapor deposition (PECVD) dielectrics is studied. The new curing scheme is based on porogen removal (organic sacrificial phase introduced to generate open porosity) from PECVD dielectric before its final UV curing. The results are compared with the PECVD films fabricated in the conventional scheme in which porogen is still present during the UV curing. The same curing time of porogen-containing conventional PECVD films with 172 nm and >200u2002nm UV sources results in only 10% difference in their Young’s modulus (YM): 5.84 and 5.32 GPa, respectively. However, the porogen-free films cured with 172 nm UV source show a YM of 6.64 GPa (k100u2002kHz∼2.2, 44% open porosity), approximately twice as large as those cured with >200u2002nm UV having a YM of 3.38 GPa (k100u2002kHz∼2.0, 48% open porosity). The mechanical properties, optical properties in the range of 150–800 nm, dielectric constants at 100 kHz an...

Intrinsic effect of porosity on mechanical and fracture properties of nanoporous ultralow-k dielectrics

The intrinsic effect of porosity on the mechanical and fracture properties of ultralow-k dielectrics is demonstrated using a special curing process that allows a separate control of porosity and matrix properties. The stiffness and fracture energy highly depend on the precise pore structure of the film. A change in relative Youngs modulus behavior with open porosity and average pore diameter was found and attributed to the percolation of mesopores.

Influence of porosity on dielectric breakdown of ultralow-k dielectrics

The effect of porosity on the electrical properties of porogen-free ultralow-k dielectric materials was demonstrated using a special curing process that allows a separate control of porosity and matrix properties. It is shown that the leakage current was insensitive to porosity, suggesting a bulk conduction mechanism. On the other hand, higher porosity leads to lower breakdown voltage, indicating that porosity can degrade the electrical reliability performance of the dielectric material. The observed lower breakdown field is explained in terms of the amount of cage structure in the film, the exacerbation of strain in the Si–O–Si backbone structure by an external electric field, and local field enhancements near the pores, thereby making the Si–O bond highly susceptible to breakage.

Influence of the UV Cure on Advanced Plasma Enhanced Chemical Vapour Deposition Low-

In a recent study, low-k thin films with low dielectric constant (≤2.1) and high Youngs modulus (>5 GPa) were obtained by introducing a remote plasma step between the traditional plasma enhanced chemical vapour deposition and UV curing. This study shows that the UV curing step with a narrow band lamp with wavelength of 172 nm induced more network Si–O and Si–H bonds and more densification than the curing step with a broadband lamp with wavelengths higher than 200 nm. As a consequence, the dielectric constant of the narrow band cured film was slightly higher, but Youngs modulus and hardness were much improved. Electrical characterization showed good breakdown voltages and a more than sufficient time dependent dielectric breakdown reliability. The broadband lamp was then used to form thicker films which retained very well the characteristics of the thin films.

k

This paper demonstrates the use of cube corner indentation tests performed at elevated temperatures to measure the coefficient of thermal expansion (CTE) of ultralow-k dielectric films. Using this approach, the CTE of organo-silicate glass low-k films with different intrinsic film stresses is estimated to vary between 8.2u2009±u20090.8u2009ppm/u2009°C and 10.9u2009±u20091.1u2009ppm/u2009°C. The advantages and limitations of the proposed test methodology are discussed.

Materials

In the work presented here, we focused on fabrication of Cu nails for 3D Stacked-Integrated-Circuits (3D-SIC) applications using electrochemical deposition from the bath with model (‘open source’) additives. We have studied the effects of bath composition on the Cu fill profile and overburden, and have also examined the correlations between phenomena observed during post-plating-processing and bath composition. Based on these results, we explored different approaches to improving Cu removal rate during Chemical Mechanical Polishing (CMP).

Thermal expansion coefficients of ultralow-k dielectric films by cube corner indentation tests at elevated temperatures

Stress is becoming an increasingly critical parameter for all steps in back‐end‐of‐line integration. As the k‐value of dielectric spacers decreases their mechanical integrity scales accordingly, making the interconnect stack increasingly sensitive to barrier and copper stresses. These stresses need to be studied not only for as‐deposited layers, but also during thermal processing. Stress relaxation of the barrier can for instance occur at elevated temperatures and result in severe dielectric deformation. Copper typically relaxes at elevated temperatures during thermal cycling and then builds‐up thermal stress when cooled back to room temperature. However, the initial stress state can have a strong effect on the final microstructure. An example is shown here where a new growth mode, named ‘super‐secondary‐grain‐growth, is stress induced and leads to grains of many tens of microns.

TSV Cu Plating and Implications for CMP

The aggressive scaling of dimensions of wires and the accompanying severe requirements for electrical performance and variability control has lead to a paradigm shift in the research on Cu wires and low k dielectrics. Rather than focusing on the bulk characteristics of the materials, it has become mandatory to concentrate on the control of the relevant interface and surfaces, in the scaled volume of the material. For the latter new metrology needs to be researched and developed.

Stress in Next Generation Interconnects

This paper describes the influence of microstructure, or more specifically grain orientation and grain size, on the in-line monitoring of copper interconnect properties during (self)-anneal using surface acoustic wave spectroscopy (SAWS). In electroplated Cu after (self)-anneal the SAWS frequency is lower for samples annealed at higher temperature because of the lower porosity induced elasticity. In sputtered Cu, the SAWS frequency shows a clear correlation with grain size, which is induced by a strong re-orientation of the copper film from the as-deposited (111) texture (E=190 GPa) to a strongly (100) textured super grain structure (E=78GPa).