Kyu-Sung Park

Characterization of tin oxide/LiMn2O4 thin-film cell

An amorphous, thin film of tin oxide is tested as an anode to replace lithium metal in a thin-film battery. Tin oxide shows irreversible discharge capacity in its initial state, and this gives rise to capacity loss on the first charge–discharge process. Thus, in terms of electrochemical properties, lithium metal is better than tin oxide as an anode for a thin-film battery. In some applications, however, thin-film batteries must withstand high fabrication temperatures (over 250°C to 260°C). Lithium metal film cannot be applied in such conditions due to its low melting point (181°C). Tin oxide is not only able to endure high fabrication temperatures but can also preserve its capacity for a large number of cycles after the initial discharge process. In this study, a thin film of amorphous tin oxide has been prepared by means of a sputtering method. Its suitability as an anode for a thin-film battery is examined. A thin film of LiMn2O4, prepared by a sol–gel method is used for the cathode.

Fabrication of LiCoO2 thin films by sol-gel method and characterisation as positive electrodes for Li/LiCoO2 cells

Abstract LiCoO 2 thin films are receiving attention as positive electrodes (cathodes) for thin-film microbatteries. In this study, LiCoO 2 thin films are fabricated by a sol–gel spin-coating method and a post-annealing process. The thermal decomposition behaviour of the precursor is investigated by thermogravimetry/differential thermal analysis TG/DTA and mass spectroscopy. The crystallinity, microstructure and electrochemical properties of the final films are also studied by X-ray diffraction (XRD), scanning electron microscopy (SEM) and galvanostatic charge-discharge cycling tests. Films heat-treated under appropriate conditions exhibit high capacity and good crystallinity and are therefore considered to be candidates as cathodes for thin-film microbatteries.

Characteristics of tin nitride thin-film negative electrode for thin-film microbattery

Abstract Tin nitride is a relatively unknown compound. In this study, the tin nitride thin film is examined as a negative electrode for a thin-film microbattery. Reactive rf magnetron sputtering is used for deposition of films with varying deposition temperature. The charge–discharge properties of thin films deposited at room temperature, 100 and 200°C are found to be satisfactory. As the irreversible capacity fraction increases, rechargeability is improved. Finally, it is suggested that the electrochemical characteristics of tin nitride are similar to those of the tin oxide system. The charge–discharge characteristics are investigated in several ways.

The electrochemical properties of thin-film LiCoO2 cathode prepared by sol–gel process

LiCoO2 thin films have received attention as cathodes of thin-film microbatteries in these days. In this study, LiCoO2 thin films were fabricated by a sol–gel spin coating method and an annealing process. They were deposited on Pt(111) and Pt(200) substrates to investigate the effect of orientation of current collector. The crystallinity, microstructure and electrochemical properties of final films are also studied by XRD, SEM and galvanostatic charge/discharge cycling test. Films heat-treated under appropriate conditions exhibit high capacity and good crystallinity so those films are considered to be candidates as cathodes for thin-film microbatteries.

A 10 bit piecewise linear cascade interpolation dac with loop gain ratio control

This paper proposes a 10 bit linear interpolation digital-to-analog converter (DAC) with area efficiency and a high resolution for an AMLCD drive. Because this proposed structure implements a 1 bit interpolation circuit with a control block for a loop gain ratio, it shows a wide voltage range of interpolation as well as superior linearity. The proposed circuit is fabricated with Samsung 90nm CMOS 1.5V / 5V technology. The power dissipation is 7uW/channel, and the chip area of the 10 bit piecewise linear DAC is only 91% of the area of a conventional 8 bit resistor DAC. The INL and DNL properties are +0.8LSB/−0.2LSB and +0.23LSB/-0.23LSB, respectively. The maximum interchannel DVO is 10mV without the application of any offset cancellation techniques.

27.4: A 10‐Bit Serial Integration‐Type DAC Architecture for AMLCD Column Drivers

A 10-bit serial integration-type DAC architecture based on discrete-time integrator using switched-capacitor structure is proposed for AMLCD column drivers in this paper. This proposed serial DAC architecture can dramatically reduces its size by minimizing the size of capacitors used for integration using a simple capacitor swapping algorithm per frame. The design of the proposed DAC was dedicated to mobile application and has been fabricated in 0.35μm 3.3V CMOS process.

27.2: A Buffer Amplifier with Embodied 4‐Bit Interpolation for 10‐Bit AMLCD Column Drivers

A buffer amplifier for 10-bit digital-to-analog converter (DAC) with embodied 4-bit interpolation is proposed for AMLCD column drivers. Under the proposed interpolating scheme, the reference voltage from 6-bit DAC is interpolated with the voltage generated from 4 bit directly inputted codes in the buffer amplifier. This proposed circuit can reduce the effective size of the DACs, and achieve the accurate channel output maintaining the basic function of the buffer amplifier. The average static current of the proposed buffer amplifier is 1.2μA per each channel and the simulated result of INL and DNL by 0.35μm CMOS process is less than 0.06 and 0.05 LSB.

6.2: A 10 Bits Modified VCC Interpolation and DVO Correction by Drain Current Injection

A 10b modified VCC interpolation and DVO correction scheme is proposed. The proposed structure minimizes the needs for interpolation of LCD column driver IC. And additional part for 4 bits interpolation is only one differential pair, one tail current mosfet, and some logics compared with conventional railtorail buffer amplifier [1]. The proposed DVO correction scheme can improve the channel uniformity of column driver IC. So the further reduction of area is possible. The 90nm CMOS process is used for simulation and layout size is compared. The power consumption is 6uW per channel.