Kyung-Mun Byun

Reduction of plasma-induced damage during intermetal dielectric deposition in high-density plasma

We have attempted to reduce the plasma-induced damage to the thin gate oxides during intermetal dielectric (IMD) gap-fill process by high-density plasma (HDP) chemical vapor deposition (CVD). It was revealed that the optimization of preheating step could reduce the damage. The H/sub 2/-based HDP CVD process was also effective in reducing plasma-induced damage compared with the conventional He-based process. The gate oxide failure was reduced remarkably at the low deposition temperatures less than 400/spl deg/C. Both the significant damage reduction and the excellent gap-fill performance were achieved by the adoption of the phosphorus silicate glass (PSG) using the low temperature H/sub 2/-based HDP CVD technique.

Robust spin-on glass gap-fill process technology for sub-30nm interlayer dielectrics

A highly robust gap-fill process technology of spin-on glass (SOG) was developed for the interlayer dielectric (ILD) in sub-30nm devices. We revealed that the filling behavior of SOG within gaps during spin-coating is mainly dependent on the capillary effect. The highly wettable surface treatment prior to SOG coating was found to enhance the gap-fill performance remarkably. This technique plays a key role in maximizing capillary effect by raising surface wettability. The filling capability was also improved by optimization of baking temperature to minimize the viscosity of SOG. It was finally found that the defects of contact bridges due to poor filling of SOG were reduced to be almost free by those unique process refinements.