Laurence Moquillon

65-, 45-, and 32-nm Aluminium and Copper Transmission-Line Model at Millimeter-Wave Frequencies

An improved analytical model of the CMOS 65-, 45-, and 32-nm silicon technology integrated transmission line is proposed. This model is derived from previous classical ones used for printed circuits board lines. Improvements have been performed to take into account the size of integrated lines. The study is validated up to millimeter-wave frequencies for different linewidths realized with various metal levels. Accurate results allow the model to be implemented in commercial computer-aided design software commonly used for millimeter-wave designs. A comparison with commercial tools is carried out.

A CMOS class-A 65nm power amplifier for 60 GHz applications

A millimeter-wave power amplifier (PA) implemented in a 65 nm CMOS process with 8-metal layers and transistor fT/fMAX of 160/200 GHz is reported. The PA operates from a 1.2 V supply voltage. A power gain of 13.4 dB, an output P1dB of 12.2 dBm with 7.6 % PAE and a saturated output power of 13.8 dBm at 58 GHz are measured. S11 and S22 are lower than 10 dB, which ensures an input and output matching to a 50 ¿ impedance. These results are obtained thanks to accurate millimeter wave models for MOS and integrated microstrip lines used as passive components. The amplifier design takes electromigration constraints at 105°C into account. Excellent agreement between measurement and simulation results is observed.

Hot-Carrier Stress Effect on a CMOS 65-nm 60-GHz One-Stage Power Amplifier

The effects of RF hot-carrier stress on the characteristics of 60-GHz power amplifiers (PAs) on a CMOS 65-nm process are investigated, for the first time, in this letter. A reliability study is made on a one-stage PA to validate an aging model and the degradation explanation. A drop of 16% of the gain, 17% of the 1-dB output compression point (<i>OCP</i>_{1 dB}), and 17% of the <i>P</i>_sat are measured at 60 GHz after 50 h of stress under <i>V</i>_dd = 1.65 V with <i>P</i>_in = 0 dBm and <i>V</i>_dd = 1.9 V with <i>P</i>_in = -10 dBm at 60-GHz frequency.

Design-in-Reliable Millimeter-Wave Power Amplifiers in a 65-nm CMOS Process

A hot carrier ageing model previously validated on a one-stage 60-GHz power amplifier (PA) is demonstrated to be able to predict the degradation of the characteristic parameters for multistage high-performance millimeter-wave (mmW) PAs. The increase in the threshold voltage, the decrease in the transconductance, and the output conductance of the MOSFETs caused by hot carriers leads to a degradation in performance of the PAs. Consequently, by using this ageing model, the mmW PA lifetime can be extracted. A new PA is then designed, taking into account the ageing effects, and is shown to be reliable during ten years. This amplifier exhibits a power gain of 20 dB, an output 1-dB compression point of 12.5 dBm with 6.6% power-added efficiency, and a saturated output power of 16 dBm at 60 GHz.

Low Noise Low Cost Rx Solutions for Pulsed 24GHz Automotive Radar Sensors

This work presents the performance of an integrated low noise amplifier (LNA) and Gilbert cell mixer integration and also a voltage controlled oscillator (VCO) performance. Differential topology was used to achieve the down converter. LNA measurements report 22.5 dB gain and about 3.2 dB noise figure at 24 GHz. Large signal results give IP1dB of -15 dBm. The mixer measurements show very interesting results of 15 dB conversion gain and 5 dBDSB noise figure. This allows a down converter of 31.8 dB gain and 3.5 dBDSB noise figure which provides a dynamic range of 37 dB. The design of these circuits was performed considering temperature and process variations. Nevertheless, results obtained at 24 GHz have never been published using a standard 0.17 mum BiCMOS SiGe 170 GHz fT featuring 1.7 V Bvceo.

DC hot carrier stress effect on CMOS 65nm 60 GHz power amplifiers

The effects of dc hot carrier stress on the characteristics of 60GHz power amplifiers on CMOS 65nm are investigated. The increase in the threshold voltage, the decrease in the transconductance and the output conductance of the MOSFETs caused by hot carriers leads to a loss performances of the PAs. A reliability study is first made on a 1 stage PA to validate the ageing model and the degradation explanation. A drop of 5% the gain, 7% of the OCP1dB, 7% of the Psat are measured at 58GHz after 50 hours of stress under Vdd=1.7V on a 4 stages amplifier.

Reliability study under DC stress on mmW LNA, Mixer and VCO

A reliability study under DC stress has been conducted on a low noise amplifier (LNA), a mixer and a voltage controlled oscillator (VCO). Both mmW blocks were designed with heterojunction bipolar transistor (HBT) 0.13μm SiGe process from STMicroelectronics. Regarding simulations and HBT degradation studies, DC stresses were defined to provide HBT degradation within the mmW blocks. S parameters were characterized for the LNA; conversion gain and low frequency noise (LFN) were measured for the mixer; oscillation frequency and phase noise were respectively characterized and simulated. LNA and mixer are designed for 77 GHz automotive radar applications and the VCO is designed for 60 GHz wHDMI standard. Limited degradations on mmW blocks characteristics were observed for significant stress conditions covering a time to fail (TTF) of 10years.

TFMS Microstrip line modelling and characterization up to 110 GHz on 45 nm node silicon technology: application for CAD

An improved analytical model for integrated microstrip line experienced on 45 nm silicon technology is proposed. This model is derived from previous classical ones used for PCB circuits. Improvements have been performed to take into account the sizing effects for integrated lines. The study is performed up to 110 GHz for different line widths and results accuracy allow implementing the model in CAD software like Eldo, Spectre and the Agilent tools (RFDE, ADS, and GoldenGate) for mm-wave designs.

Low power and high linearity millimeter wave differential mixer using passive transformer

A low power and high linearity millimeter wave mixer for automotive radar application is designed using SiGe BiCMOS technology. The concept of design is based on a Gilbert type cell. The proposed topology uses separated voltage sources (1.5 V and 2 V for the transconductance and switching stage respectively) via a transformer. This mixer allows high output dynamic range with low power consumption. The chip was characterized by on-wafer measurements. At 77 GHz, the voltage conversion gain (GC) and double side band noise figure (NFDSB) are 13.7 dB and 11.4 dB respectively. Input referred 1-dB compression point (ICP1dB) is 2 dBm. Total power consumption is 15 mW. The size of mixer core is 550 × 410 μm2.

Design-in reliability approach for Hot Carrier injection modeling in the context of AMS/RF applications

Both AMS/RF applications and High-Speed digital designs present voltage transitions much faster than the conventional quasi-static experiments used to build up Hot Carrier models. This work combined reliability simulations and experimental DC/RF stresses to demonstrate that our framework of HCI reliability simulations is suitable to re-produce electrical ageing up to 60GHz.