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Dive into the research topics where Leah M. P. Pastel is active.

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Featured researches published by Leah M. P. Pastel.


international test conference | 2004

Data mining integrated circuit fails with fail commonalities

Leendert M. Huisman; Maroun Kassab; Leah M. P. Pastel

We describe ways to use fail data from many failing integrate circuits (ICs) to determine which ICs failed because of similar causes, rather than to determine the cause of each individual failing IC. The purpose of finding clusters of similarly failing ICs is to focus on systematic defects, and to de-emphasize random ones. Once large groups of similarly failing ICs have been identified, a selection of the ICs in each group can be diagnosed using standard diagnostic routines.


advanced semiconductor manufacturing conference | 2010

Identifying design systematics using learning based diagnostic analysis

Rao H. Desineni; Leah M. P. Pastel; Maroun Kassab; Mohammed Fazil Fayaz; Julie Lee

With billions of transistors being integrated on a single chip by modern VLSI manufacturing processes, traditional yield learning techniques based on defect density present serious drawbacks. Manufacturing process simulation and yield prediction techniques based solely on random defects are increasingly deviating from the actual yields. Design rules are constantly being modified as new design marginalities are uncovered during yield learning, often without much statistical/yield validation. In this paper, we present a new diagnostic technique that merges volume diagnosis data with detailed layout analysis to quantify the true impact of design systematics. The presented technique has been successfully used at IBM to confirm or refute suspected design marginalities on multiple products manufactured in technologies ranging from 90nm through 45nm.


international test conference | 2010

Hard to find, easy to find systematics; just find them

Rao H. Desineni; Leah M. P. Pastel; Maroun Kassab; Robert C. Redburn

In a manufacturing organization, every morning starts with the question: what is the yield today? The cost of wafer manufacturing being fairly constant, product yield is one of the most significant variables for profitability. With the yield paretos increasingly dominated by systematic defects, yield learning based on product test is fast becoming a fundamental requirement. For an integrated device manufacturer like IBM, product-based yield learning is even more critical as this drives technology learning as well. In this paper, we will present some of IBMs yield learning techniques and several case studies from high-volume manufacturing. These techniques extend from test data analysis, to analysis of scan-based product diagnosis results, to detailed layout analysis in conjunction with test, diagnosis and inline defect inspection data. We will discuss the increasing levels of complexity associated with the various techniques and argue that an effective yield learning strategy must comprise all of the above.


advanced semiconductor manufacturing conference | 2004

Using embedded objects for yield monitoring

Greg Bazan; F. Gravel; Leendert M. Huisman; A. Pardee; Leah M. P. Pastel; K. Rowe

In this article, we describe the use of embedded objects, such as scan chains and RAMs, for yield learning and as defect monitors. We discuss why these objects are suitable for yield learning, and what needs to be done to use them as such. We close with a number of examples, showing the use of embedded chains to improve yield.


Archive | 2011

Method for testing integrated circuits

Rao H. Desineni; Maroun Kassab; Leah M. P. Pastel


Archive | 2004

Segmented scan chains with dynamic reconfigurations

Leendert M. Huisman; Leah M. P. Pastel


Archive | 2003

Using clock gating or signal gating to partition a device for fault isolation and diagnostic data collection

Leendert M. Huisman; William V. Huott; Leah M. P. Pastel


Archive | 2001

Internal cache for on chip test data storage

Thomas Bartenstein; L. Owen Farnsworth; Douglas C. Heaberlin; Edward E. Horton; Leendert M. Huisman; Leah M. P. Pastel; Glen E. Richard; Raymond J. Rosner; Francis Woytowich


Archive | 2004

METHOD FOR DESIGNING AN INTEGRATED CIRCUIT DEFECT MONITOR

John M. Cohn; Leah M. P. Pastel


Archive | 2002

Method to detect systematic defects in VLSI manufacturing

Leendert M. Huisman; Maroun Kassab; Leah M. P. Pastel

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