Li-Jui Chen

Characterization of ArF immersion process for production (Invited Paper)

ArF immersion lithography is essential to extend optical lithography. In this study, we characterized the immersion process on production wafers. Key lithographic manufacturing parameters, overlay, CD uniformity, depth of focus (DOF), optical proximity effects (OPE), and defects are reported. Similar device electrical performance between the immersion and the dry wafers assures electrical compatibility with immersion lithography. The yield results on 90-nm Static Random Access Memory (SRAM) chips confirm doubling of DOF by immersion as expected. Poly images of the 65-nm node from a 0.85NA immersion scanner are also shown.

A sophisticated metrology solution for advanced lithography: addressing the most stringent needs of today as well as future lithography

Advanced lithography is becoming increasingly demanding when speed and sophistication in communication between litho and metrology (feedback control) are most crucial. Overall requirements are so extreme that all measures must be taken in order to meet them. This is directly driving the metrology resolution, precision and matching needs in to deep sub-nanometer level [4]. Keeping the above in mind, a new scatterometry-based platform is under development at ASML. Authors have already published results of a thorough investigation of this promising new metrology technique which showed excellent results on resolution, precision and matching for overlay, as well as basic and advanced capabilities for CD [1], [2], [3]. In this technical presentation the authors will report the newest results from this ASML platform. This new work was divided in two sections: monitor wafer applications (scanner control - overlay, CD and focus) and product wafer applications.

Effects of laser bandwidth on iso-dense bias and line end shortening at sub-micron process nodes

Control of Isolated and Dense line Bias (IDB) and Line End Shortening (LES) in a lithographic process has become increasingly important, particularly for the 65nm node and below. The IDB depends on many factors, for example, focus, lens aberrations, partial coherence and laser spectral bandwidth. This work studies the impact to IDB and LES from changes in laser bandwidth at two sub-micron process nodes. Careful measurements of both FWHM and E95 bandwidth parameters of the laser spectral profile were carried out using two types of spectrometers. The spectral bandwidth was adjusted over a larger range than normally experienced during wafer exposures by carefully varying the laser operating conditions to provide controlled changes in bandwidth while maintaining all other laser performance parameters within specification. Measurements of both linewidth and LES on several substrates were made and correlated with laser bandwidth to determine the sensitivity of IDB and LES to bandwidth variation. The sensitivity of different structures to E95 bandwidth variation was assessed

A paradigm shift in scatterometry-based metrology solution addressing the most stringent needs of today as well as future lithography

Advanced lithography is becoming increasingly demanding when speed and sophistication in communication between litho and metrology (feedback control) are most crucial. Overall requirements are so extreme that all measures must be taken in order to meet them. This is directly driving the metrology resolution, precision and matching needs in to deep sub-nanometer level as well as driving the need for higher sampling (throughput). Keeping the above in mind, a new scatterometry-based platform (called YieldStar) is under development at ASML. Authors have already published results of a thorough investigation of this promising new metrology technique which showed excellent results on resolution, precision and matching for overlay, as well as basic and advanced capabilities for CD. In this technical presentation the authors will report the newest results taken from YieldStar. This new work is divided in two sections: monitor wafer applications and product wafer applications. Under the monitor wafer application: overlay, CD and focus applications will be discussed for scanner and track hotplate control. Under the product wafer application: first results from integrated metrology will be reported followed by poly layer and 3D CD reconstruction results from hole layers as well as overlay-results from small (30x60um), process-robust overlay targets are reported.

Immersion defect reduction, part II: the formation mechanism and reduction of patterned defects

193-nm immersion lithography is the only choice for the 45-nm logical node at 120-nm half pitch and extendable to 32- and 22-nm nodes. The defect problem is one of the critical issues in immersion technology. In this paper, we provided a methodology to trace the defect source from optical microscope images to its SEM counterparts after exposure. An optimized exposure routing was also proposed to reduce printing defects. The average defect count was reduced from 19.7 to 4.8 ea/wafer.

Defect reduction with special routing for immersion lithography

This letter reports record-breaking low defect counts for immersion lithography, the mechanism for forma- tion of particle-printing defects, and for two new exposure routings to achieve the low defect counts. Both new routings make the slot-scan directions parallel to the field-stepping directions, whereas in the normal routing the two directions are perpendicular to each other. From experimental data, the average defect count for one of the special routings is 4.8 per wafer, while it is 19.7 per wafer for normal routing.

Characterization of charging in CD-SEM for 90-nm metrology and beyond

Three parameters, measurement times, charging distances, and charging area, are studied with respect to measurement of the local charging effect. We found that the effects of measurement times and charging distances to the local charging is under observation limit and the measured CD deviation is very small. However, the charging area is found to be the most dominant parameter for local charging. A 7-nm CD deviation from this local charging is observed. After the root cause of the local charging is understood and controlled, we use an extra charging area at the opposite side of the measurement site to compensate for the charging effect. The SEM image and CD deviation are greatly improved after this compensation. At last, a novel measurement algorithm is introduced to deal wiht the actual OPE evaluation. From simulation, the net Coulomb force experienced during the measurement is greatly reduced with the new algorithm compared with that used in the normal measurement sequence. The comparison of the global charging and local charging effects is also discussed in this report.

Immersion defect reduction, part I: analysis of water leaks in an immersion scanner

This paper reports the water-leakage mechanism of the immersion hood in an immersion scanner. The proposed static analysis reveals the immersion hood design performance in defect distribution. A dynamic water-leakage model traces the leaked water and identifies its position on the wafer, during exposure. Comparing simulation to experimental results on bare-silicon and resist-coated wafers, the defect type, source of residuals, and critical settings on the immersion system were clearly identified.

Application of scatterometry for CD and profile metrology in 193-nm lithography process development

ArF resist lines are tested using scatterometry to study the CD correlation with CDSEM, profile variation caused by baking temperature and pattern environment, as well as the evaluation of optical proximity effect (OPE). Results show reasonable profiles variation predicted by scatterometry spectra from different baking temperatures. Other good matches are the predicted resist line profiles from dark-field and clear-field pattern environment and various line-pitch ratios. They are found to be very similar with the images from the cross-section SEM. On the other hand, the CD linearity and OPE are also found with good matches between scatterometry CD and SEM CD. However, the maximum pitch size tested for OPE is 0.6 μm. More sparse patterns aer believed to have lower sensitivity caused by the weak characteristics spectrum detected. The spectrum sensitivity is another important topic in this paper. The CD and pitch information is contained across the entire spectrum while small profile variations, like t-top and footing, are predicted in the shorter wavelength region. To predict accurate resist profile for small CD, the usage of the shorter wavelength spectrum is inevitable.

Cross-platform (NXE-NXT) machine-to-machine overlay matching supporting next node chip manufacturing

EUV lithography enables the transition from multiple patterning in DUV back to single patterning in EUV, with the associated cost benefit. While imaging and patterning becomes easier with EUV, cross-platform overlay performance needs to be taken into account. With quadruple patterning, the matching performance is driven by the platform capabilities, with platform specific fingerprints not contributing to the matching performance as they are similar for each layer. Introducing EUV automatically means we need to compensate for the differences in the platform fingerprints, as they bring a penalty in the DUV-EUV matching budget. This paper will explain what the main overlay contributors in cross-platform matched machine overlay are and how they can be cancelled or reduced using additional correction measures, with the goal to reach below 2.0 nm cross matched machine overlay.