Lulu Peng

A new embedded inductor for ZVS DC-DC converter applications

In this paper, a new tapered silicon-embedded coreless power inductor is proposed and demonstrated. The width and depth for the different turns of the inductor are designed with different values to reduce the proximity effect. An 18.6 nH inductance and a peak Q factor of 12.1 are achieved at 23 MHz within a chip area of 0.8 mm2. The AC power loss of the inductor is reduced by a maximum of 56% using the novel design. The inductor shows a peak efficiency of 91% in ZVS conversion applications, and is the highest in monolithic ZVS DC-DC converters reported so far.

A Simple Low Cost Monolithic Transformer for High-Voltage Gate Driver Applications

A simple low cost monolithic 3D through-silicon-via coreless transformer is designed and fabricated for high-voltage gate driver applications. The transformer comprises the primary coil embedded in the bottom layer of a Si substrate and the secondary coil built on the front-side of the substrate. Compared with conventional transformers with both coils built on the front-side or at the backside, the proposed structure has the advantages of area-saving and cost-effectiveness. A coreless transformer with primary, secondary, and mutual inductances of 260, 280, and 112 nH, respectively, is fabricated in a small area of 2 mm2. It achieves both high galvanic isolation and satisfactory voltage gain (0.41 from 4 to 45 MHz).

A Novel Silicon-Embedded Toroidal Power Inductor With Magnetic Core

In this letter, a novel post-CMOS silicon-embedded toroidal power inductor with an MnZn ferrite composite core is proposed and demonstrated. The inductor is accommodated within the groove at the backside of a Si chip and connected to the front-side IC through vias for area saving, electromagnetic interference suppression, and large power-handling capability. A 2.9-mm2 embedded inductor with an inductance of 43.6 nH and a peak Q-factor of 16.2 is fabricated. It achieves a saturation current of 10 A, making it promising for on-chip light-emitting diode driver applications.

A novel 3D TSV transformer technology for digital isolator gate driver applications

In this paper, a novel 3D TSV (Through-Silicon-Via) transformer technology for power system-on-chip applications is proposed and demonstrated experimentally. The transformer used in the power system features a galvanic isolation of > 4 kV and a voltage gain of > -3 dB from 10 MHz to 100 MHz. It can be embedded in the bottom layer of a silicon substrate and sandwiched between system circuitries for ultimate area efficiency and the smallest possible form factor compared with other conventional on-silicon approaches. A digital isolator gate driver built using this transformer technology is achieved, and successful signal transfer is clearly illustrated.

A Novel Integrated Power Inductor With Vertical Laminated Core for Improved L/R Ratios

In this letter, a novel integrated power inductor with a vertical laminated NiFe magnetic core for improved inductance to resistance ratio (L/R) ratios is proposed and demonstrated. Both the windings and magnetic core are accommodated within a groove at the backside of a silicon substrate and connected to the front-side IC through vias for compactness. NiFe is used to increase the inductance, and vertical lamination is used to suppress the eddy current in the magnetic core and assist hard axis alignment. A 1-mm2 embedded inductor with 131-nil inductance and 60-mΩ dc resistance working in megahertz range is fabricated. The L/R ratio is increased by seven times compared with integrated inductors with similar area, making it suitable for portable electronics power conversion system-on-chip applications.