M. De Matteis

A 0.55 V 60 dB-DR Fourth-Order Analog Baseband Filter

A 0.55 V supply voltage fourth-order low-pass continuous-time filter is presented. The low-voltage operating point is achieved by an improved bias circuit that uses different opamp input and output common-mode voltages. The fourth-order filter architecture is composed by two active- Gm-RC biquadratic cells, which use a single opamp per-cell with a unity-gain-bandwidth comparable to the filter cut-off frequency. The - 3 dB filter frequency is 12 MHz and this is higher than any other low-voltage continuous-time filter cut-off frequency. The -3 dB frequency can be adjusted by means of a digitally-controlled capacitance array. In a standard 0.13 mum CMOS technology with VTHN ap 0.25 V and VTHP ap 0.3 V, the filter operates with a supply voltage as low as 0.55 V. The filter (total area=0.47 mm2) consumes 3.4 mW. A 8 dBm-in-band IIP3 and a 13.3 dBm-out-of-band IIP3 demonstrate the validity of the proposal.

A 6 th -Order 100μA 280MHz Source-Follower-Based Single-loop Continuous-Time Filter

The source follower is a well known basic building block for CMOS design. A capacitively loaded source follower acts as a 1st-order low- pass filter and exhibits excellent linearity, especially with reduced overdrive voltages. In these source-follower features have been used advantageously in the design of a 2nd-order (biquadratic) low-pass filter and a 4th- order filter, which was made by cascading two 2nd-order cells. We have used this technique to design single-loop high-order source- follower-based continuous-time filters that, like ladder filters, have transfer functions that are insensitive to component variations. An efficient CMOS realization demonstrates the principle an achieves lower power and smaller area than other solutions.

CLARO-CMOS, a very low power ASIC for fast photon counting with pixellated photodetectors

The CLARO-CMOS is an application specific integrated circuit (ASIC) designed for fast photon counting with pixellated photodetectors such as multi-anode photomultiplier tubes (Ma- PMT), micro-channel plates (MCP), and silicon photomultipliers (SiPM). The first prototype has four channels, each with a charge sensitive amplifier with settable gain and a discriminator with settable threshold, providing fast hit information for each channel independently. The design was realized in a long-established, stable and inexpensive 0.35mm CMOS technology, and provides outstanding performance in terms of speed and power dissipation. The prototype consumes less than 1 mW per channel at low rate, and less than 2 mW at an event rate of 10 MHz per channel. The recovery time after each pulse is less than 25 ns for input signals within a factor of 10 above threshold. Input referred RMS noise is about 7.7 ke (1.2 fC) with an input capacitance of 3.3 pF. With this value of input capacitance a timing resolution down to 10 ps RMS was measured for pulser signals of a few million electrons, corresponding to the single photon response for these detectors.

A 255 MHz Programmable Gain Amplifier and Low-Pass Filter for Ultra Low Power Impulse-Radio UWB Receivers

A 90 nm-CMOS power-optimized analog baseband chain for ultra-low-power impulse-radio ultra-wideband (IR-UWB) receivers is presented. The proposed device merges the functions of a programmable gain amplifier (PGA) and a low-pass filter (LPF). It consists of the cascade of three biquadratic cells made up by opamps in a series-shunt configuration, which features high input impedance, low load effects in the cascade blocks, and better frequency response. The opamp parameters are included in the overall biquad transfer function. This allows getting very low power performance, since the opamp bandwidth is not required to be much larger than the filter cutoff frequency. Moreover, the current consumption is optimized according to the selected gain level (1.3 mA at 0 dB-gain up to 1.9 mA at 40 dB-gain). The PGA features a 0-40 dB programmable gain range with a 5 dB gain-step. The LPF performs a sixth-order 255 MHz low-pass frequency response. For the overall chain the IIP3 is 14 dBm at 0 dB gain, while the input referred noise is 12.5 nV/√Hz at 40 dB gain.

A high-band IR-UWB chipset for real-time duty-cycled communication and localization systems

A 90nm, IR UWB, duty-cycled transceiver chipset, for operation from 7 to 9.8GHz and compliant to the IEEE802.15.4a and the upcoming IEEE802.15.6 standard, is presented. The complete, duty-cycled transmitter provides +1dBm peak output power, consuming 4.4mW. The receiver front-end shows −88dBm sensitivity at 0.85Mbps and a digital synchronization algorithm enables real-time duty cycling, resulting in a mean power consumption of 3mW.

A CMOS 5 nV

An analog baseband chain for a multistandard (Bluetooth, WCDMA/UMTS, and WLAN) reconfigurable receiver in a 0.13 mum CMOS occupying 1.65 mm2 is presented. The circuit consists of an open-loop programmable-gain amplifier (PGA1), an active-Gm-RC low-pass filter (LPF), and a closed-loop programmable-gain amplifier (PGA2). The chain gain can be programmed in the range -6 divide 68 dB, while the input-referred noise (IRN) is 5 nV/radicHz. A dynamic range (DR) larger than 82 dB is achieved for a 1% total harmonic distortion (THD). The current consumption is minimized and adjusted for the different operation conditions, down to 11 mA for the full chain.

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In this paper advances on analog filter design for telecom transceivers are addressed. Portable devices require a strong power consumption reduction to increase the battery life. Since a considerable part of the power consumption is due to the analog baseband filters, improved and/or novel analog filter design approaches have to be developed. In this paper some advances on this field reported in last years are summarized. Each design (developed for different standards) exploits the standard specifications with different architectures and circuit strategies devoted to power consumption reduction. The first is for reconfigurable Bluetooth/UMTS/WLAN receivers, the second is for very-low voltage (550 mV) WLAN receivers, the third one is for impulse-radio UWB receivers, while the fourth is for very low-power OFDB-UWB receivers.

Hz 74-dB-Gain-Range 82-dB-DR Multistandard Baseband Chain for Bluetooth, UMTS, and WLAN

A fast charge sensitive preamplifier was designed and built in a 90 nm CMOS technology. The work is part of the R&D effort towards the read out of pixel or small strip sensors in next generation HEP experiments. The preamplifier features outstanding noise performance given its wide bandwidth, with a ENC (equivalent noise charge) of about 350 electrons RMS with a detector of 1 pF capacitance. With proper filtering, the ENC drops to less than 200 electrons RMS. Power consumption is 5 mW for one channel, and the closed loop bandwith is about 180 MHz, for a risetime down to 2 ns in the fastest operation mode. Thanks to some freedom left to the user in setting the open loop gain, detectors with larger source capacitance can be read out without significant loss in bandwidth, being the rise time still 5.5 ns for a 5.6 pF detector. The output can drive a 50 ? terminated transmission line.

Advanced analog filters for telecommunications

In this paper an analytical procedure to design the single-opamp active-RC Rauch biquadratic cells is presented. The design procedure optimizes the trade-off between the opamp input referred noise and the thermal noise due to the filter resistors, in order to minimize the current consumption. The proposed procedure is validated by means of a benchmark of a biquadratic cell for an UMTS and WLAN applications. The design is realized using the 0.13mum CMOS technology with a 1.2V supply voltage

A fast and low noise charge sensitive preamplifier in 90 nm CMOS technology

Ultra Wide Band (UWB) technology has been developed in the last years in the framework of short-range low data rate communications. Due to the wide channels bandwidth and low power characteristics it provides a very different approach to wireless technologies compared to conventional narrow band systems. This makes it interesting in medicine area with many potential applications. In this chapter, the discussion is focused on the application of this technology in medical monitoring, and Wireless Body Area Networks.