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Dive into the research topics where M. Rafat is active.

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Featured researches published by M. Rafat.


Semiconductor Science and Technology | 2014

A high performance charge plasma based lateral bipolar transistor on selective buried oxide

Sajad A. Loan; Faisal Bashir; M. Rafat; Abdul Rehman M. Alamoud; Shuja A. Abbasi

In this paper, we present a new structure of lateral bipolar transistor on selective buried oxide. The device does not use highly doped regions; however, it employs the concept of creating n and p type charge plasma in undoped silicon by using metal electrodes of different work functions. The proposed device is named as the selective buried oxide based bipolar charge plasma transistor (SELBOX-BCPT). An extensive 2D simulation study has revealed that the proposed SELBOX-BCPT device not only possesses all the advantages of the conventional BCPT device, but it also addresses various severe problems of the BCPT device. A significant improvement in major issues of poor cutoff frequency (fT), low breakdown voltage and thermal efficiency has been achieved. It has been observed that the fTxa0has increased by ∼94.6%, the breakdown voltage by 23.47% and the device is much cooler than the conventional BCPT device. A large current gain is obtained in the proposed device and is on a par with the conventional BCPT device. Further, by using mixed-mode simulation feature of the Atlas simulator, inverting amplifiers based on SELBOX-BCPT and the conventional BCPT have been realized. A significant improvement of 15% in switching-on transient time and 25.8% in switching-off transient time has been achieved in the proposed device in comparison to the conventional BCPT device.


Semiconductor Science and Technology | 2014

A high performance charge plasma PN-Schottky collector transistor on silicon-on-insulator

Sajad A. Loan; Faisal Bashir; M. Rafat; Abdul Rehman M. Alamoud; Shuja A. Abbasi

In this paper, we propose a new high performance PN-Schottky collector (PN-SC) lateral bipolar junction transistor (BJT) on silicon-on-insulator (SOI). The proposed device addresses the problem of poor speed of conventional lateral PNP-BJT device by using a Schottky collector. Further, it does not use the conventional ways of ion implantation/diffusion to realize n and p type doped region. However, it uses metal electrodes of different work functions to create n and p type charge plasma in an undoped silicon film. The simulation study of the proposed lateral PN-SC bipolar charge plasma transistor on SOI (PN-SC-BCPT) device has shown a significant improvement in current gain (?), cutoff frequency (f T) and switching performance in comparison to conventional PNP-BJT and PNP-bipolar charge plasma transistor (PNP-BCPT) devices. A significantly high ? is obtained in the proposed PN-SC-BCPT (?2100) in comparison to PNP-BCPT (?1450) and the conventional BJT (?9) devices, respectively. It has been observed that there is 89.56% and 153.5% increase in f T for the proposed PN-SC-BCPT device (2.18 GHz) in comparison to conventional PNP-BJT (1.15 GHz) and PNP-BCPT (0.86 GHz) devices, respectively. Further, reductions of 24.6% and 15.4% in switching ON-delay and 66% and 30.76% in switching OFF-delay have been achieved in the proposed device based inverters in comparison to PNP-BCPT and the conventional BJT devices based inverters, respectively. Furthermore, the proposed device does not face doping related issues and the requirement of high temperature processing is absent.


2014 20th International Conference on Ion Implantation Technology (IIT) | 2014

A high performance double gate dopingless metal oxide semiconductor field effect transistor

Sajad A. Loan; Faisal Bashir; M. Rafat; Abdul Rahman M. Alamoud; Shuja A. Abbasi

In this work, we propose a new structure of a double gate dopingless metal oxide semiconductor field effect transistor (MOSFET). The proposed device does not employ the conventional ways of ion implantation or diffusion to realize source and drain regions. However, it uses metals of different workfunctions to induce n+ source and drain regions in undoped silicon; a charge plasma concept. A 2D numerical simulation study has shown that a significant improvement in various performance parameters has been achieved in the proposed device. It is observed that the subthreshold slope (S) and cutoff frequency (fT)has significantly improved in the proposed device in comparison to a conventional doped MOSFET. Further, the leakage current was significantly decreased in the proposed device. Furthermore, since the proposed device does not employ ion implantation or diffusion to realize source and drain regions, therefore, it is free from random doping fluctuations (RDF) and doping control issues, and most importantly, it can be processed at low temperature.


ieee annual information technology electronics and mobile communication conference | 2017

A junctionless inverted-TFET with increased ON-current and reduced ambipolarity

M. Ehteshamuddin; Sajad A. Loan; M. Rafat; Abdullah G. Alharbi

In this paper, we simulate and investigate a novel Tunnel Field-Effect Transistor (TFET) using the charge plasma concept on the source side. Herein, an inverted p-type source is created to form a p+-n tunneling diode structure on a uniformly n-type doped thin silicon film, hence named, Inverted-TFET (I-TFET). Using calibrated simulations, we verify that the Ion is boosted (□ 20 times) in the proposed I-TFET compared to the p-i-n DG-TFET at a gate workfunction of 4.5 eV. This approach of source formation alleviates the problem of highly abrupt source-channel junction requirement associated with metallurgical junctions in scaled modern transistors. Hence, the use of expensive annealing techniques is mitigated and therefore, it facilitates future scaling of the device. Further, the ambipolar behavior has been suppressed by 6.65 ×10−1 times in I-TFET compared to the DG-TFET.


Archive | 2015

Charge Plasma Based Bipolar Junction Transistor on Silicon on Insulator

Sajad A. Loan; Faisal Bashir; Asim M. Murshid; Humyra Shabir; M. Rafat; M. Nizamuddin; Abdul Rahman M. Alamoud; Shuja A. Abbasi

Charge plasma based devices are gaining interest due to various reasons, since these devices doesn’t require conventional ways of creating different doping regions, therefore these devices are free from various doping related issues related, as random doping fluctuations, doping activations and the requirement of high temperature annealing are absent in these devices. In this work we put forward a novel lateral pnp bipolar transistor on silicon on insulator. Metals of different work function are used to induce n and p type charge plasma on undoped silicon to have emitter, base and collector regions. The 2D simulation study has revealed that a very high current gain is achieved in the proposed device in comparison to conventional pnp transistor. The charge plasma concept is very much appropriate in surmounting the doping related issues such as diffusion or ion implantation, random doping fluctuations and high thermal budget in current nano devices.


international conference on microelectronics | 2014

High performance charge plasma based multi zone lateral bipolar junction transistor

Sajad A. Loan; Faisal Bashir; M. Rafat; Shuja A. Abbasi; Abdul Rahman M. Alamoud

In this paper, we propose a new structure of a lateral bipolar junction transistor (LBJT) on silicon on insulator (SOI), employing multi zone collector drift region. The novelty of the device is the use of charge plasma concept to realize emitter, base and multi zone collector drift regions. Here metals of different work functions are used to realize these regions instead of conventional doping methods of diffusion and ion implantation. The numerical simulation of the proposed multi zone charge plasma LBJT (MZCP-LBJT) on SOI has been performed and the key characteristics have been compared with the conventionally doped LBJT (CD-LBJT) on SOI. A significant improvement in the ON current (ION), current gain, cutoff frequency (fT) and breakdown voltage has been observed in the proposed device. It has been observed that current gain increases by ~ 20 times and ION by 10 times in the proposed device. Further, by using an optimized gap between the collector and base regions, a 34% increase in fT is achieved in the proposed device. Furthermore, the proposed device does not face doping related issues and the requirement of high temperature processing is absent, as it uses charge plasma concept to realize different regions, instead of the conventional doping methods.


Journal of Computational Electronics | 2015

A high performance gate engineered charge plasma based tunnel field effect transistor

Faisal Bashir; Sajad A. Loan; M. Rafat; Abdul Rehman M. Alamoud; Shuja A. Abbasi


IEEE Transactions on Electron Devices | 2018

A High-Performance Inverted-C Tunnel Junction FET With Source–Channel Overlap Pockets

Ashita; Sajad A. Loan; M. Rafat


Semiconductor Science and Technology | 2018

A vertical-gaussian doped soi-tfet with enhanced dc and analog/rf performance

M. Ehteshamuddin; Sajad A. Loan; M. Rafat


Journal of Computational Electronics | 2018

Ambipolar leakage suppression in electron–hole bilayer TFET: investigation and analysis

Ashita; Sajad A. Loan; Abdullah G. Alharbi; M. Rafat

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Ashita

Jamia Millia Islamia

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