Norhayati Soin

Theoretical development and critical analysis of burst frequency equations for passive valves on centrifugal microfluidic platforms.

This paper presents a theoretical development and critical analysis of the burst frequency equations for capillary valves on a microfluidic compact disc (CD) platform. This analysis includes background on passive capillary valves and the governing models/equations that have been developed to date. The implicit assumptions and limitations of these models are discussed. The fluid meniscus dynamics before bursting is broken up into a multi-stage model and a more accurate version of the burst frequency equation for the capillary valves is proposed. The modified equations are used to evaluate the effects of various CD design parameters such as the hydraulic diameter, the height to width aspect ratio, and the opening wedge angle of the channel on the burst pressure.

Energy Distribution of Positive Charges in Gate Dielectric: Probing Technique and Impacts of Different Defects

Positive charges (PCs) in gate dielectric shift the threshold voltage and cause a time-dependent device variability. To assess their impact on circuits, it is useful to know their distribution for a wide energy range both within and beyond silicon bandgap. Such a distribution is still missing, and a technique for its extraction has not been demonstrated yet. The central objective of this paper is, for the first time, to develop a new fast technique and to demonstrate its capability for probing the energy distribution of PCs over such a wide energy range. Results show that PCs can vary significantly with energy level. The PCs in different energy regions clearly originate from different defects. The PCs below the valence band edge are as-grown hole traps that are insensitive to stress time and temperature, and substantially higher in thermal SiON. The PCs above the valence-band edge are from created defects. The PCs within the bandgap have a peak near Ev + 0.8 eV and saturate for either longer stress time or higher stress temperature. In contrast, the PCs above a conduction band edge, namely the antineutralization positive charges, do not saturate, and their generation is clearly thermally accelerated.

Push pull microfluidics on a multi-level 3D CD

A technique known as thermo-pneumatic (TP) pumping is used to pump fluids on a microfluidic compact disc (CD) back towards the CD center against the centrifugal force that pushes liquids from the center to the perimeter of the disc. Trapped air expands in a TP air chamber during heating, and this creates positive pressure on liquids located in chambers connected to that chamber. While the TP air chamber and connecting channels are easy to fabricate in a one-level CD manufacturing technique, this approach provides only one way pumping between two chambers, is real-estate hungry and leads to unnecessary heating of liquids in close proximity to the TP chamber. In this paper, we present a novel TP push and pull pumping method which allows for pumping of liquid in any direction between two connected liquid chambers. To ensure that implementation of TP push and pull pumping also addresses the issue of space and heating challenges, a multi-level 3D CD design is developed, and localized forced convection heating, rather than infra-red (IR) is applied. On a multi-level 3D CD, the TP features are placed on a top level separate from the rest of the microfluidic processes that are implemented on a lower separate level. This approach allows for heat shielding of the microfluidic process level, and efficient usage of space on the CD for centrifugal handling of liquids. The use of localized forced convection heating, rather than infra-red (IR) or laser heating in earlier implementations allows not only for TP pumping of liquids while the CD is spinning but also makes heat insulation for TP pumping and other fluidic functions easier. To aid in future implementations of TP push and pull pumping on a multi-level 3D CD, study on CD surface heating is also presented. In this contribution, we also demonstrate an advanced application of pull pumping through the implementation of valve-less switch pumping.

NBTI degradation effect on advanced-process 45 nm high-k PMOSFETs with geometric and process variations

Negative bias temperature instability (NBTI) has become an important reliability concern for nano-scaled complementary metal oxide (CMOS) devices. This paper presents the effect of NBTI for a 45 nm advancedprocess high-k dielectric with metal gate PMOS transistor. The device had incorporated advanced-process flow steps such as stress engineering and laser annealing in order to achieve high on-state drain current drive performance. To explore NBTI effects on an advanced-process sub-micron device, the 45 nm high-k PMOS transistor was simulated extensively with a wide range of geometric and process variations. The device was simulated at varying thicknesses in the dielectric layer, oxide interfacial layer, metal gate and polysilicon layer. In order to observe the NBTI effect on process variation, the NBTI degradation of the 45 nm advanced-process PMOS is compared with a 45 nm PMOS device which does not employ process-induced stress and incorporates the conventional rapid thermal annealing (RTA) as compared to the laser annealing process which is integrated in the advanced-process device flow. The simulation results show increasing degradation trend in terms of the drain current and threshold voltage shift when the thicknesses of the dielectric layer, oxide layer as well as the metal gate are increased.

Negative bias temperature instability lifetime prediction: Problems and solutions

Lifetime of pMOSFETs is limited by NBTI. Conventional slow measurement overestimates lifetime due to recovery. The fast techniques suppress recovery, but cannot give reliable prediction. This work proposes a new lifetime prediction technique that overcomes the shortcomings of both slow and fast methods, based on the As-grown-Generation (AG) model. Its advantages over those based on Reaction-Diffusion (RD) and two-stage models include its simple algorithm, only two fitting parameters at a given temperature, and no need for a kinetic model for the as-grown hole traps. This makes it readily implementable in industrial laboratories for process screening.

Analysis and experiment of centrifugal force for microfluidic ELISA CD platform

This paper presents an analysis and experiment of centrifugal force for microfluidic Enzyme-Linked Immunosorbent Assay (ELISA) on a compact-disc (CD) platform. The ELISA CD was designed based on the centrifugal force as a driving force while capillary force acts as preventing barrier. The CD composed of 2 layers: the substrate layer is made of PMMA and the top layer is laminated with an Adhesive Sealing Films (ASF) or thermal seal. The PMMA substrate was fabricated by CNC micromachining. The ELISA CD consists of 7 reservoirs: waste, detection, serum, conjugate, washing solution, substrate and stopping solution. In the experiment, the reservoirs were filled with colour liquid and the fluid flow behaviour of the liquid in the CD was studied and monitored by a customized CD spin stand system equipped with visualization system. The experimental test results show an average of 9% error when compared with the theoretical calculation of burst frequency for all the reservoirs.

Regional clock gate splitting algorithm for clock tree synthesis

In this paper, the new clock distribution design flow and algorithm of clock gate splitting to improve the clock gates enable signal timing violations had been presented. The clock gate components in a clock tree are exposed to setup timing violations due to the nature that the clock gates skew is normally big as they are located at the beginning of the clock tree. The effective splitting of the clock gate to the lower level of the clock tree will improve the clock gate skew and thus improve the setup margin.

Lab-on-a-disk as a potential microfluidic platform for dengue NS1-ELISA

Detection of non-structural protein 1 (NS1) of dengue virus can gives early diagnosis of dengue and shows high sensitivity. Current technique uses for the dengue NS1 detection is enzyme-linked-immusorbent assay (ELISA) on 96 microwell plate. However, the assay requires long incubation time about 90 minutes (for antigen-antibody interaction) and total assay time takes almost 2 hours and 30 minutes to complete. Therefore, a lab-on-a-disk with applied centrifugal force is proposed as a potential microfluidic platform to reduce the assay time by effectively mix and separate liquid in the ELISA assay. The advantages of the technique are having large specific volume, short diffusion length, minimum reagents consumption and simplify procedures. The lab-on-a-disk will exploit centrifugal and capillary forces to act as a passive valve to control the flow sequence of different solutions involved. Each steps of the ELISA process is carried out automatically by controlling the rotation speed of the disk. This paper will describe the lab-on-a-disk platform on its microfluidic principles, fabrication process, detection systems, biosensor applications, and the proposed model for dengue NS1-ELISA assay.

Capacitive interfacing for MEMS humidity and accelerometer sensors

This paper presents a study on the design issues of the electronic interfacing circuit for MEMS humidity and accelerometer sensors. The study focuses on capacitive sensing method as its one of the most important and widely used techniques in interfacing the micro sensors. Some of capacitive sensing techniques are reviewed and appropriate read out interfacing circuit for humidity and accelerometer sensors were chosen depends on their sensing capacitance magnitude. The Hartley oscillator circuit is proposed to interface the MEMS humidity sensor which is its capacitance is in the range of 180–500pF (G.Nagy, 2007) depending on the relative humidity values. The feedback circuit of Hartley Oscillator is designed at 998.473 kHz of resonant frequency with 167.09 degree of phase shift. At this particular frequency, the maximum gain achieved at about 11dB. To ensure the oscillation begins, the amplifier with 13dB of gain is connected to the feedback circuit. The result of the oscillator circuit, which is based on capacitance to frequency converter are generally 5- 15% of calculated results. Chopper stabilization sensing circuit is chosen for interfacing MEMS accelerometer sensor. This sensor was based on an acceleration sensing capacitor which is the displacement of the moving electrode results in a change in the capacitance. The chopper stabilization results the proportional output voltage to capacitance changes for a very small sensing capacitance magnitude which is less than 1pF. (G.Nagy, 2007).These two interfacing read out electronics circuit was simulated by using National Instrument Multisim 10.1 software. The results from both simulation shows that the capacitive interfacing circuits are suitable for each sensor application.

Performance and Device Design Based on Geometry and Process Considerations for 14/16-nm Strained FinFETs

The multigated architecture of FinFETs appear attractive for continued CMOS scaling with the addition of discrete fin sizing that brings a new variable into the design. In this paper, a comprehensive 3-D simulation on 14/16-nm advanced-process FinFET under geometric and process considerations was presented in order to achieve the best possible performance with minimal penalty. Geometric designs, specifically the width and height of the fins as well as the channel lengths, were imposed onto the FinFET, and the impact on the performance merits and devices characteristics was analyzed. The influence of stress engineering, metal gate work function (WF), and doping concentration was further explored for an allowable leakage limit. The simulation suggests that the process-induced stress can boost the 14/16-nm FinFET drain current up to two or three times. It was also found that the channel length is the most critical geometric parameter to affect the performance of both the pFinFET and nFinFET, of which 60% and 50% increases in its respective drain current were observed as the channel length is scaled from 35 nm to 15 nm. In addition, a change in metal WF is found to be the most effective method for the adjustment of threshold voltage.