Margus Kruus

Hierarchical Identification of Untestable Faults in Sequential Circuits

Similar to sequential test pattern generation, the problem of identifying untestable faults in sequential circuits remains unsolved. Most of the previous works in untestability identification operate at the logic-level and, thus, the methods do not scale. Current paper points out a new class of sequentially untestable faults, called register input logic stuck-on faults. We show that it is possible to identify such faults from the register-transfer level (RTL) description of the circuit. Moreover, we prove by experiments that the considered faults form a large subclass of all the untested faults.

FPGA-based time and cost effective Hamming weight comparators for binary vectors

The paper shows that resources and performance of Hamming weight comparators for binary vectors significantly depend on available basic elements from which the comparators are built and, thus, to optimize the final circuits different design techniques need to be applied. The presented analysis of existing solutions clearly demonstrates that although they may be efficient for one platform (such as fully customized circuits), for another platform (such as FPGA) they become not advantageous at all. The paper suggests several, supplementing each other, Hamming weight counters and comparators based on optimized mapping of the circuits to FPGA look-up tables giving the best performance and the fewest resources compared to the best known alternatives. It is shown that the proposed methods are easily adjustable to a wide range of problem dimensions. Besides, the paper gives well-defined recommendations that enable the most appropriate circuit to be chosen for particular requirements such as the size of the vectors and the required performance. Final evaluations of the results have been done through prototyping in FPGAs and comparison with the best known alternatives.

Improved VHDL Input for High-Level Synthesis Tool xTractor

In this paper, an improved version of VHDL compiler for an academic high-level synthesis tool xTractor is presented. A synthesizable subset of behavioral VHDL, accepted by the compiler, is described in brief. Improvements that allow descriptions at higher abstraction level are outlined. The compiler translates the behavioral VHDL subset into control oriented flow-chart like internul description IRSYD. The mapping of higher abstraction level VHDL constructs into IRSYD is described in more details. A short description of the synthesis tool is presented

Web-based system for sequential machines decomposition

This work focuses on particular but comprehensive problem of finite state machine (FSM) decomposition. The task of the FSM decomposition is essential to sequential circuits design optimization in implementation-independent manner. The main goal of the investigations has been to elaborate decomposition synthesis methods for high complexity FSMs and their implementation as Web-based computer design system. The theoretical basis for the investigation has been the algebraic structure theory of FSMs, its further development in accordance with the needs of digital systems design practice to handle the task of partition of hardware description into a network of interconnected FSMs targeting optimization criteria. Consideration of decomposition synthesis leads to investigation of hard NP-complete combinatorial problems. The synthesis system under development should not be only design automation software but it should be a research tool and educational system.

Teaching FPGA-based systems

In this paper we report on recent advances in teaching Field-Programmable Gate Array-based systems within engineering courses given in two Universities: University of Aveiro in Portugal and Tallinn University of Technology in Estonia. Although both institutions have a 6-year history of intensive and fruitful collaboration in this area there is a constant need to update both the teaching methods and the respective laboratory equipment and tools to keep in pace with the demanding industry requirements. This paper describes the most recent changes in the organization of the respective courses and the corresponding teaching materials. In particular, the developed communication modules required for software/hardware co-design are explained in detail.

Hardware close programming for freshmen

For the future engineers, it is important during their studies to connect the acquired knowledge learned with the real life. It is also important to understand the problems and have the ability to apply their fresh knowledge know-how in solving different tasks. This paper concentrates on providing students with the possibility to apply their software-oriented programming skills to hardware implementations during the first year of their studies. Two different platforms are described - based on embedded microcontroller and FPGA solutions, providing various hands-on exercises for both individual assignments and teamwork. Both proposed task groups are accompanied with thorough documentation and web-based study material. Through solving the provided tasks, the students are able to get more clear comprehension of applying their skills to real-life problem solving.

Using mobile technology to enhance teaching reconfigurable systems

Nowadays, reconfigurable computing constitutes an essential part of engineering practice. This undoubtedly requires huge qualified engineering resources. To assist the educational process in the scope of reconfigurable systems, animated tutorials, mini-projects, language templates, and a course-oriented library have been developed and reported in previous publications. This paper discusses further improvements and international collaboration in relevant courses based on the results of the project “Using HP mobile technology to enhance teaching reconfigurable systems in electrical and computer engineering curricula” running in 2009-2012. Assessment results are presented proving that the innovations have led to improved student learning.

Involving students in teaching process — Encouraging student-generated content in ICT studies

This paper deals with new paradigms rising in contemporary teaching, where classical “teacher-to-student” approach is shifting to more flexible and diverse ways of teaching and learning. We describe our experience at the Department of Computer Engineering of Tallinn University of Technology in involving engineering students into the process of creating learning content on various ICT subjects.

A decomposition procedure for register-transfer level power management

Power dissipation has become one of the most important constraints in the design of integrated circuits. This work describes a decomposition based approach for power reduction using dynamic power management. The problem of low power synthesis corresponds to an optimal multiple decomposition of a finite state machine. A decomposition procedure that enables the distribution of primary controller inputs among components is elaborated. The technique for decomposition is based on quantitative modeling through entropic relationships. The presented technique leads to a general low power design methodology targeting selective disabling of a subset of primary inputs.

Reconfigurable systems in engineering education: Best practices and future trends

Advantages of reconfigurable systems and their importance for engineering education are reported in many publications. The paper presents recent results in this area that are achieved within long-term collaboration of two Universities: University of Aveiro in Portugal and Tallinn University of Technology in Estonia. Many alternative curricula have been analyzed and tested, and finally the following two-level strategy has been chosen: 1) an introductive segment on FPGA technology is given within the disciplines on digital design for the first year students; 2) a number of advanced courses, one of which is obligatory and the other optional, are given for the fourth and fifth year students. The paper discusses the methodology that has been developed and successfully realized. We also demonstrate advantages of both the proposed course structure and continuous evaluation with the main objective to disseminate the results.