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Dive into the research topics where Leon R. Barstad is active.

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Featured researches published by Leon R. Barstad.


international microsystems, packaging, assembly and circuits technology conference | 2012

Electroplating through holes with different geometry -- A novel and high productivity process for through hole fill plating

Elie H. Najjar; Leon R. Barstad; Jayaraju Nagarajan; Marc Lin; Maria Anna Rzeznik; Mark Lefebvre

A novel DC through hole filling process was formulated for high volume HDI and substrate core layer metallization production. The process yields high quality results over a wide current density range.


international microsystems, packaging, assembly and circuits technology conference | 2010

Copper electroplating for HDI and IC substrate through hole fill

Mark Lefebvre; Leon R. Barstad; Luis Gomez

Established methods for filling through holes in core layers of HDI and IC substrates are labor intensive, multistep processes that rely on mechanical filling with epoxy or paste after conformal through hole metallization, planarization, and a cap layer of electrodeposited copper before subsequent build-up of additional dielectric layers. Additionally, the mechanical strength and thermal conductivity properties of current epoxy or paste materials used to fill through holes are sub-optimal. With recent advances in copper electroplating technology, it is now possible to completely fill through holes in build-up core layers with planar, void-free solid copper electrodeposits, while simultaneously improving mechanical and thermal properties. The use of a single copper electroplating process eliminates the separate filling, planarization and capping steps, shortening the circuit board manufacturing process. This paper describes a novel pattern-plate, Direct Current (DC) copper electroplating process designed for filling core layer through holes in HDI and IC substrates. Copper through hole fill performance for a variety of substrate thicknesses and hole diameters as a function of chemical parameters, processing variables and electroplating equipment design is discussed.


international microsystems, packaging, assembly and circuits technology conference | 2008

Next Generation Electroplating Process for HDI Microvia Filling and Through Hole Plating

Mark Lefebvre; Elie H. Najjar; Luis Gomez; Leon R. Barstad

As higher and higher pin-count semiconductor packages are deployed in telecommunications and data processing applications, Printed Circuit Board (PCB) substrates must evolve to allow increased routing densities. To be capable of meeting these routing density and complexity needs, higher layer counts must be combined with filled microvias. High Density Interconnect (HDI) product of this type places significant new demands on the metallization processes, in particular, copper electroplating. To meet these needs, seemingly incompatible objectives must be met. Thinner and more uniform surface copper deposits have to be produced, increasingly difficult microvia geometries must be filled, through-hole throwing power delivered, while maintaining plating rates capable of delivering production throughputs. These demands often exceed the capability of current commercial copper electroplating processes. This paper describes a new pattern-plate, Direct Current (DC) copper electroplating process designed for HDI and packaging substrate applications. Microvia filling performance, plated through hole throwing power, surface distribution / trace profile and product reliability data, as a function of a variety of processing variables is discussed.


international microsystems, packaging, assembly and circuits technology conference | 2015

Next generation Copper electroplating for HDI micro-via filling and through hole plating

Nagarajan Jayaraju; Leon R. Barstad; Zukhra Niazimbetova; Maria Anna Rzeznik; Marc Lin; Dennis Yee

A novel DC blind micro via filling process was formulated for high volume HDI and substrate core layer metallization production. The process yields high quality results over a wide current density range. The process will be commercialized and it is anticipated that there will be substantial future growth in adoption of this technology to fill blind micro vias. This new chemistry in combination with optimized plating conditions and plating equipment can fill blind micro vias of various geometries. The plated copper has excellent physical and mechanical properties with a mirror bright surface. This formulation is intended to be used with either vertical or horizontal in-line jet impingement equipment in both panel and pattern modes. All organic additives can be easily monitored and controlled by conventional CVS analysis techniques.


international microsystems, packaging, assembly and circuits technology conference | 2009

Electroplating equipment design considerations for copper microvia filling

Mark Lefebvre; Elie H. Najjar; Luis Gomez; Leon R. Barstad; Bruce Chen; Martin W. Bayes

Electrolytic copper microvia filling is an enabling technology, prominently used in todays manufacture of advanced HDI and packaging substrate product. In the high volume mass production of copper filled microvias, a wide variety of electroplating equipment designs are available to the fabricator. In this article, various aspects of electroplating equipment design used in the mass production of copper filled microvias are discussed, including a comparison of continuous and batch systems, anode materials, solution delivery (convection), and copper replenishment. The impacts of these variables on microvia filling performance, plated through hole throwing power, surface distribution, trace profile and bath life are described.


international microsystems, packaging, assembly and circuits technology conference | 2016

Next generation electrolytic copper plating process for HDI applications

Nagarajan Jayaraju; Leon R. Barstad; Don Cleary; Zukhra Niazimbetova; Tony Liao; Caroline Grand; Joanna Dziewiszek; Maria Anna Rzeznik; Marc Lin; Dennis Yee

Copper electroplating is a critical step in the fabrication of reliable High Density Interconnect (HDI) substrates intended for use as core layers in build-up applications. HDI substrates may contain vias and through holes having several different dimensions that make it challenging to meet via filling and hole throwing power (TP) requirements. A next generation Electrolytic Copper plating process was developed to fill blind micro vias and provide good TP in through holes to meet the demands of this market. Void-free bottom-up fill in via features with higher throwing power in through holes is achieved with this novel Direct Current (DC) copper electroplating product. The copper via fill plating bath is formulated with novel additives to operate over a wide range of operating conditions.


Archive | 2002

Electrolytic copper plating method

Leon R. Barstad; James E. Rychwalski; Mark Lefebvre; Stephane Menard; James L. Martin; Robert A Schetty; Michael P. Toben


Archive | 2005

Electrolytic copper plating solutions

Leon R. Barstad; James E. Rychwalski; Mark Lefebvre; Stephane Menard; James L. Martin; Robert A Schetty; Michael P. Toben


Archive | 2000

Seed layer repair method

Denis Morrissey; David Merricks; Leon R. Barstad; Eugene N. Step; Jeffrey M. Calvert; Robert A Schetty; James G. Shelnut; Mark Lefebvre; Martin W. Bayes; Donald E. Storjohann


Archive | 2001

Plating bath analysis

Wade Sonnenberg; Mark J. Kapeckas; David L. Jacques; Raymond Cruz; Leon R. Barstad; Elie H. Najjar; Eugene N. Step; Robert A. Binstead

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