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Dive into the research topics where Martin Pölzl is active.

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Featured researches published by Martin Pölzl.


Microelectronics Reliability | 2001

Ultra-thick gate oxides: charge generation and its impact on reliability

Udo Schwalke; Martin Pölzl; Thomas Sekinger; Martin Kerber

Abstract In this work, degradation and breakdown characteristics of ultra-thick gate oxides ( T ox : 50–150 nm) used in power MOS devices is investigated. Measurements indicate, that in addition to charge generation via Fowler–Nordheim tunneling, a second mechanism becomes dominant in ultra-thick gate oxides even at moderate electrical fields (i.e. 7–8 MV/cm). The results suggest, that impact ionization and related electron–hole pair creation by energetic electrons is responsible for the experimental observations. The impact of these results on the interpretation of lifetime extrapolations from accelerated tests will be discussed.


international symposium on power semiconductor devices and ic's | 2015

95% DC-DC conversion efficiency by novel trench power MOSFET with dual channel structure to cut body diode losses

O. Häberlen; Martin Pölzl; J. Schoiswohl; M. Rösch; S. Leomant; Gerhard Nöbauer; Walter Rieger

A novel 25V silicon trench power MOSFET optimized for fast and high efficient switching with record Ron*Qg and Ron*Qoss figure-of-merits is reported. A dual channel structure with two different gate oxide thicknesses allows reducing the body diode conduction losses by up to 50% and enables 95% DC-DC conversion efficiency.


international integrated reliability workshop | 2000

Reliability issues of ultra-thick gate oxides

Udo Schwalke; Martin Pölzl; Thomas Sekinger; Martin Kerber

In this work, degradation and breakdown characteristics of ultra-thick gate oxides (Tox: 50 nm-120 nm) used in power MOS devices is investigated. Measurements indicate, that the established thin-oxide models for lifetime extrapolations from accelerated tests may not be appropriate for ultra-thick oxides and lead to erroneous results.


Archive | 2003

Method for fabricating a transistor configuration including trench transistor cells having a field electrode, trench transistor, and trench configuration

Ralf Henninger; Franz Hirler; Joachim Krumrey; Walter Rieger; Martin Pölzl; Heimo Hofer


Archive | 2003

Semiconductor component with an increased breakdown voltage in the edge area

Ralf Henninger; Franz Hirler; Joachim Krumrey; Markus Zundel; Walter Rieger; Martin Pölzl


Archive | 2004

Power transistor arrangement and method for fabricating it

Martin Pölzl; Franz Hirler; Oliver Häberlen; Manfred Kotek; Walter Rieger


Archive | 2003

Transistor configuration with a structure for making electrical contact with electrodes of a trench transistor cell

Joachim Krumrey; Franz Hirler; Ralf Henninger; Martin Pölzl; Walter Rieger


Microelectronics Reliability | 2002

Negative bias temperature stress on low voltage p-channel DMOS transistors and the role of nitrogen

S. Gamerith; Martin Pölzl


Archive | 2003

Field-effect-controllable semiconductor component and method for fabricating the component

Ralf Henninger; Franz Hirler; Martin Pölzl; Walter Rieger


Archive | 2006

Field-effect transistor for poly-poly metal oxide semiconductor circuit, particularly for use with ohm source poly contact, has substrate that is formed with surface along trench, which has trench base and trench edge

Dietmar Kotz; Martin Pölzl; Rudolf Zelsacher

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