Martti Voutilainen

Graphene for future electronics

We discuss some aspects of how graphene could be used in mainstream electronic devices. The main focus is on signal processing applications in high-volume, industrially manufactured battery-powered devices, e.g. mobile phones and laptop computers, but we will also discuss applicability to other components like interconnects, wireless communication antennae and camera sensors, as well as novel types of signal processing devices, based on the unique physical properties of graphene.

Multi-gigabit serial link emissions and mobile terminal antenna interference

Future mobile terminal digital interconnections are introducing spectrum components in cellular frequencies in an increasing manner. Control of interconnection impedance and common mode noise introduced from them are key elements for robust device design. Electromagnetic coupling from multi-gigabit serial links used for display and camera data transmission in mobile device to positioning and cellular wireless communication receivers depends mainly on common-mode content of serial link signal, and on common-mode coupling strength between the serial link interconnection and cellular receiver antenna. Frequency spectrum of common-mode component of serial link output voltage and current are determined by simulations or measurements, and 8-port S-parameters are used in calculations of induced disturbance power coupled to cellular receiver. Minimum required common-mode attenuation was found to be typically −60dB.

Graphene and Carbon Nanotube Applications in Mobile Devices

This paper presents potential carbon nanoelectronic applications in battery-powered mobile devices such as mobile phones and laptop computers. Based on the physical behavior of carbon nanotubes (CNTs) and graphene and the specific requirements for portable consumer electronic devices, the main challenges and restrictions for the adoption of carbon-based components by the industry are presented. The main emphasis is on electronic components, particularly transistors and radio-frequency applications. A circuit theory model is used to predict the feasibility of CNT transmission lines, and technical challenges that have to be solved before graphene transistors are suitable for mobile devices are presented. The performance of graphene transistors is compared with the corresponding parameters of silicon. In addition, other potential carbon-based applications in mobile devices aside from transistors such as displays and memory elements are outlined briefly.

A 1.2 – 6.4 GHz clock generator with a low-power DCO and programmable multiplier in 40-nm CMOS

This paper presents a clock generator for a MIPI M-PHY serial link transmitter, which includes an ADPLL, a digitally controlled oscillator (DCO), a programmable multiplier, and the actual serial driver. The paper focuses on the design of a DCO and how to enhance the frequency resolution to diminish the quantization noise introduced by the frequency discretization. As a result, a 17-kHz DCO frequency tuning resolution is demonstrated. Furthermore, implementation details of a low-power programmable 1-to-2-or-4 frequency multiplier are elaborated. The design has been implemented in a 40-nm CMOS process. The measurement results verify that the circuit provides the MIPI clock data rates from 1.248 GHz to 5.83 GHz. The DCO and multiplier unit dissipates a maximum of 3.9 mW from a 1.1 V supply and covers a small die area of 0.012 mm2.

Future mobile device interconnections

The developed concept of ultra low power multi gigabit serial interface for mobile devices removes limits from mechanical design and device architectures. Power consumption of differential line drivers were reduced to 0.8 mW by lowering common-mode voltage of signals to 200 mV and using voltage source type drivers with 50-ohm output impedance to generate +-200 mV high-speed differential signal to receiver inputs. Lowering supply voltage to 200 mV and removing the parallel termination from receiver input are possible with voltage-source type driver when output impedance is matched to line impedance, providing additional 75% power saving without any change in receiver differential input signal. Zero idle power consumption of CMOS inverters makes them ideal single-ended drivers and receivers for short control messages using the same wires as high-speed drivers when no high-speed differential signaling is required.

Dual-Interface Memory for RF Memory Tag Systems

In the simplest form the RF memory tag system consists of a stand-alone memory tag with a large non-volatile storage memory (capacity in gigabits), and a reader/writer device. The reader/writer device powers the tag wirelessly during data-transfer. An RF memory tag can be also embedded into an electronic device providing wireless access to storage memory even when the device is without a battery or the battery is empty. This enables totally new applications but set also new requirements for the memory devices. In this paper we analyze the requirements and propose dual-interface memory architecture for the RF memory tag systems.