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Dive into the research topics where Masaaki Norimatsu is active.

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Featured researches published by Masaaki Norimatsu.


international interconnect technology conference | 2008

Robustness of CNT Via Interconnect Fabricated by Low Temperature Process over a High-Density Current

Akio Kawabata; Shintaro Sato; Tatsuhiro Nozue; Takashi Hyakushima; Masaaki Norimatsu; Miho Mishima; Tomo Murakami; Daiyu Kondo; Koji Asano; Mari Ohfuti; Hiroshi Kawarada; Tadashi Sakai; Mizuhisa Nihei; Yuji Awano

We fabricated a carbon nanotube (CNT) via interconnect and evaluated its robustness over a high-density current. CNTs were synthesized at temperatures as low as 365 °C, which is probably the lowest for this application, without degrading the ultra low-k interlayer dielectrics (k = 2.6). We measured the electrical properties of CNT vias as small as 160 nm in diameter and found that a CNT via was able to sustain a current density as high as 5.0×106 A/cm2 at 105 °C for 100 hours without any deterioration in its properties.


international interconnect technology conference | 2007

Electrical Properties of Carbon Nanotube Via Interconnects Fabricated by Novel Damascene Process

Mizuhisa Nihei; Takashi Hyakushima; Shintaro Sato; Tatsuhiro Nozue; Masaaki Norimatsu; Miho Mishima; Tomo Murakami; Daiyu Kondo; Akio Kawabata; Mari Ohfuti; Yuji Awano

We studied the electrical properties of a carbon nanotube (CNT) via interconnect fabricated by a novel damascene process which is mostly compatible with conventional Cu interconnects. It was found that the resistance of 60-nm-height vias was independent of temperatures as high as 423 K, which suggests that the carrier transport is ballistic. The obtained resistance of 0.05 Omega for 2.8-mum-diameter vias is the lowest value ever reported. From the via height dependence of the resistance, the electron mean free path was estimated to be about 80 nm, which is similar to the via height predicted for 32-nm technology node (year 2013). This indicates that it will be possible to realize CNT vias with ballistic transport for 32-nm technology node and below.


Journal of Lightwave Technology | 1998

High power and high sensitivity planar lightwave circuit module incorporating a novel passive alignment method

Gohji Nakagawa; Tsuyoshi Yamamoto; Seimi Sasaki; Masaaki Norimatsu; Naoki Yamamoto; Taizo Nosaka; Koji Terada; Kazuhiro Tanaka; Kazunori Miura; Mitsuhiro Yano

A high-power, high-sensitivity planar lightwave circuit (PLC) module, comprising a laser diode (LD) and a photodiode (PD) surface mounted on a PLC platform, has been realized by a novel passive alignment technique. We used a spot-size transformed LD and a corner-illuminated PD to form a highly efficient optical coupling between the devices and a PLC waveguide. We used the unique marker alignment method to ensure accurate positioning of them. The positioning precision achieved in the lateral direction was within 1 /spl mu/m for the LDs and within 10 /spl mu/m for the PDs. The rotational precision was within 0.4/spl deg/ for both chips. We realized high power operation (>8 mW) with a high receiver sensitivity (0.3 A/W). In this paper, we describe a high power, high sensitivity PLC incorporating a novel passive optical alignment technique for LDs and PDs.


Journal of Lightwave Technology | 1995

Flip-chip planar GaInAs/InP p-i-n photodiodes-fabrication and characteristics

M. Makiuchi; Masaaki Norimatsu; Chikara Sakurai; Kentarou Kondo; Naoki Yamamoto; Mitsuhiro Yano

New flip-chip planar GaInAs/InP p-i-n photodiodes have been fabricated as an array. We describe the structure of the photodiode, the design of a microlens, the fabrication processes, characteristics, and the optical fiber-coupled modules. This photodiode satisfied the requirements for a small junction capacitance and low dark current, good optical fiber coupling, and easy fabrication. We obtained a low dark current with good reproducibility by using two layer polyimide and SiN passivation films. A microlens with a 50 /spl mu/m /spl phi/ to 120 /spl mu/m /spl phi/ aperture could easily be fabricated with an InP-substrate. By electroplating, flip-chip metal bumps were directly formed on the active region of the photodiode for the first time.


IEEE Photonics Technology Letters | 1993

Flip-chip planar GaInAs/InP p-i-n photodiode array for parallel optical transmission

M. Makiuchi; Masaaki Norimatsu; T. Sakurai; Kentarou Kondo; Mitsuhiro Yano

A back-illuminated planar GaInAs/InP p-i-n photodiode array with a simple fabrication process was developed for application to parallel optical transmission. Four p-i-n photodiodes were integrated in the array. The average capacitance and dark current were as low as 0.12 pF and 8 pA, respectively, at -5 V. At a 1.55- mu m wavelength, the quantum efficiency of each photodiode was over 80%. The cutoff frequency was 8-10 GHz with four photodiodes when the bias voltage was -3 V and the load resistance was 50 Omega . Crosstalk between channels was -12 dB at the cutoff frequency and -45 dB at 1 GHz.<<ETX>>


international conference on solid-state and integrated circuits technology | 2008

Carbon nanotube via interconnects with large current carrying capacity

Mizuhisa Nihei; Akio Kawabata; Shintaro Sato; Tatsuhiro Nozue; Takashi Hyakushima; Masaaki Norimatsu; Torno Murakami; Daiyu Kondo; Mari Ohfuti; Yuji Awano

We fabricated a carbon nanotube (CNT) via interconnect and evaluated its electrical properties. We found that the CNT via resistance was independent of temperatures, which suggests that the carrier transport is ballistic. From the via height dependence of the resistance, the electron mean free path was estimated to be about 80 nm, which is similar to the via height predicted for hp32-nm technology node. This indicates that it will be possible to realize CNT vias with ballistic transport for hp32-nm technology node and below. It was also found that a CNT via was able to sustain a current density as high as 5.0 × 106 A/cm2 at 105 °C for 100 hours without any deterioration.


Archive | 1997

Optical module including a photoreception device

Naoki Yamamoto; Masaaki Norimatsu; Goji Nakagawa; Seimi Sasaki


Archive | 2012

Electronic component and method of manufacturing electronic component

Shinichi Hirose; Taisuke Iwai; Yoshitaka Yamaguchi; Yohei Yagishita; Yukie Sakita; Masaaki Norimatsu


Archive | 2012

SHEET-SHAPED STRUCTURE, METHOD FOR MANUFACTURING SHEET-SHAPED STRUCTURE, ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE

Yoshitaka Yamaguchi; Taisuke Iwai; Masaaki Norimatsu; Shinichi Hirose; Yohei Yagishita; Yukie Sakita


Archive | 2010

Heat dissipating structure and production method therefor

Taisuke Iwai; 岩井大介; Daiyu Kondo; 近藤大雄; Yoshitaka Yamaguchi; 山口佳孝; Shinichi Hirose; 廣瀬真一; Yukie Sakita; 崎田幸恵; Yohei Yagishita; 八木下洋平; Masaaki Norimatsu; 乘松正明

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