Masamichi Azuma

Dielectric breakdown in high-ε films for ULSI DRAMs: II. barium-strontium titanate ceramics

Abstract We present a study of breakdown fields in BaxSr1−xTiO3 ceramics as functions of thickness, temperature, applied voltage ramp rate, electrode material and cross-sectional area. The data show evidence of Zener-like breakdown mechanisms. The d.c. leakage currents at voltages below breakdown are dominated by tunneling injection and image forces at low voltages (≤3 V), Schottky behavior at intermediate voltages V a (3 V ≤ V a ≤ 6 V; 150 kV/cm ≤ E ≤ 300 kV/cm), and Fowler-Nordheim tunneling at high voltages; it is shown that both the Schottky emission regime and the ultimate breakdown arise from inter-grain effects rather than the BST/electrode interface, in accord with the theory of Neumann and Arlt and of Waser and Klee. In contrast to PbZrxTi1−xO3 (PZT), which displays avalanche breakdown and space-charge limited d.c. leakage currents at normal 5 V silicon IC voltages, BST exhibits Schottky-dominated leakage currents in this 5 V regime, and is dominated by Fowler-Nordheim tunneling in its breakdown ...

A 256 kb nonvolatile ferroelectric memory at 3 V and 100 ns

One of the most important features for ferroelectric material is fast write at low voltage. This feature is used in a 256 kb nonvolatile memory that operates at 3 V power supply with a read/write time of 100 ns. Active current is 3 mA at 200 ns cycle time at 3 V for battery operation. The cell consists of 1 transistor and 1 capacitor per bit (1T1C) permitting a high level of integration. For low-voltage low-power operation, use is made of a preset reference-cell circuit, wordline boost circuits with a ferroelectric boosting capacitor and a divided-cell plate circuit.<<ETX>>

Ferroelectric Nonvolatile Memory Technology and Its Applications

Nonvolatile memory utilizing ferroelectric material is expected to be the ultimate memory due to its theoretical low power operation and fast access. We integrated a ferroelectric thin film using a standard complementary metal-oxide-semiconductor (CMOS) process and evaluated its basic characteristics and reliability including endurance and imprint effect. The film was prepared using a spin-on sol-gel method. A ferroelectric thin film formed using liquid source misted chemical deposition (LSMCD) was found to have almost the same characteristics as those of the film formed by the sol-gel method. No effects of the ferroelectric process on the CMOS transistors were observed. Design of ferroelectric memory cells and applications of the ferroelectric nonvolatile memory have been reviewed.

Temperature-dependent current-voltage characteristics of fully processed Ba0.7Sr0.3TiO3 capacitors integrated in a silicon device

Temperature-dependent current-voltage characteristics of fully processed Ba0.7Sr0.3TiO3 thin film capacitors integrated in a charge-coupled device delay-line processor as bypass capacitors were studied. The thin film capacitors with a film thickness of 185 nm were formed by metal-organic decomposition processing. The leakage current measured after completion of the integration process was 1 to 2 orders of magnitude higher than that measured after capacitor patterning. The leakage current at low voltages ( 10 V, 500 kV/cm), the Schottky mechanism plays a dominant role in leakage current, while the Frenkel-Poole emission begins to contribute to the leakage current as the temperature is elevated.

TdI10: Ferroelectric thin films in integrated microelectronic devices

Abstract We present results on four integrated ferroelectric projects: 1) An integrated barium strontium titanate thin-film on GaAs MMIC (monolithic microwave integrated circuit) with dielectric constant of 450 and loss tangent of 10−3 at 2.2 GHz operation, done as a Symetrix/Matsushita Electronics Corp. joint development; 2) A low-density (1 Kb) ferroelectric RAM (random access memory) done with PZT (lead zirconate titanate) and other ferroelectrics on CMOS (complementary metal oxide semiconductor) Si, carried out as a joint development with Olympus Optical Co.; 3) A liquid-source CVD (chemical vapor deposition) machine and its deposition of strontium titanate and barium strontium titanate films of exceptionally low d.c. leakage current (1 nA/cm2 at 120 nm thickness and 3V operation) for DRAM (dynamic RAM) applications; and 4) performance parameters of a properietary material for RAM application which is totally fatigue-free up to at least 5 × 1011 cycles.

Retention Characteristics of a Ferroelectric Memory Based on SrBi2(Ta, Nb)2O9

The polarization decay process in SrBi 2 (Ta, Nb) 2 O 9 capacitors and retention characteristics of a 288-bit ferroelectric memory device fabricated from SrBi 2 (Ta, Nb) 2 O 9 were studied. The remanent polarization decay at room temperature showed good linearity when plotted against logarithmic retention time over a wide range of 10 -3 -10 5 s. The distribution of times to failure of a 288-bit memory was fit to a model having a linear relationship between log(log t f ) and 1/T for the period of infant failures and to the Arrhenius model having the form log t f vs 1/T for the period of random failures, where t f is the time to failure and T is the temperature. The activation energy was found to be 0.35eV for infant failures and 1.15eV for random failures. Possible causes for the difference in activation energies are discussed.

Integration technology of ferroelectrics and the performance of the integrated ferroelectrics

Abstract We have successfully incorporated the ferroelectric and the high dielectric constant capacitors into integrated circuits. The GaAs MMICs with BST capacitors have been widely used for cellular phones. The BST technology is also applied to a silicon CCD delayline processor for VCRs and camcorders. With respect to the ferroelectric technology with Y1, an experimentally fabricated 256k bit FeRAM has exhibited the remarkable performance of the 100 ns and 3V operation with a 1T/1C cell configuration dedicated for the FeRAM. These integrated ferroelectrics have been achieved by controlling the ferroelectric properties in thin films and incorporating the films into GaAs and silicon devices with outstanding process technology. Furthermore, we refer to the memory cell design technology which enables the FeRAM to work below 1V. Various advantages of low-voltage and high-speed operation inherent in integrated ferroelectrics will be emphasized on the intelligent microelectronics applications toward the next m...

Voltage Shift Effect on Retention Failure in Ferroelectric Memories

We investigated the origin of retention failure in ferroelectric memories (FeRAMs) with SrBi2(Ta, Nb)2O9 (SBTN) memory cell capacitors by considering the time-dependent behavior of polarization vs. voltage (P-V ) curves of the capacitors during high-temperature storage. Since the SBTN capacitors exhibited no marked decrease in the nonvolatile component of polarization even after high-temperature storage, we focused on the effect of voltage shift observed in P-V curves. We calculated bitline voltage along the storage from the P-V curves and the bitline capacitance, and successfully estimated a decrease in the bitline voltage, which is in agreement with the retention failure in FeRAMs. In addition, the calculation indicated that the lifetime limited by the retention failure in FeRAMs with SBTN capacitors at 125°C exceeds 10 years.

Highly-reliable ferroelectric memory technology with bismuth-layer structured thin films (Y-1 family)

A highly-reliable ferroelectric memory (FeRAM) which ensures retention of data written at a low voltage of 2.5 V and humidity resistance for 10 years under a high temperature of 70/spl deg/C has been successfully developed for the first time. These excellent characteristics have been attained by a newly developed ferroelectric material with mixed superlattice crystal of Y-1 family and a integration technology which makes the use of pl-SiN passivation possible.

Low temperature crystallization of mocvd deposited sbt films

Abstract An annealing 650°C process for SrBi2Ta2O9 (SBT) has been achieved in metal organic chemical vapor deposition (MOCVD). An optimized post anneal step at 650°C is also included. The samples showed a high remnant polarization (2Pr) of 14 μC/cm2 @5V, low leakage current of 10−8 A/cm2 or less @4V, and a fatigue-free nature. This is the first report of MOCVD deposited SBT that can achieve 650°C crystallization with the post annealing.