Maxime Darnon

Pulsed high-density plasmas for advanced dry etching processes

Plasma etching processes at the 22 nm technology node and below will have to satisfy multiple stringent scaling requirements of microelectronics fabrication. To satisfy these requirements simultaneously, significant improvements in controlling key plasma parameters are essential. Pulsed plasmas exhibit considerable potential to meet the majority of the scaling challenges, while leveraging the broad expertise developed over the years in conventional continuous wave plasma processing. Comprehending the underlying physics and etching mechanisms in pulsed plasma operation is, however, a complex undertaking; hence the full potential of this strategy has not yet been realized. In this review paper, we first address the general potential of pulsed plasmas for plasma etching processes followed by the dynamics of pulsed plasmas in conventional high-density plasma reactors. The authors reviewed more than 30 years of academic research on pulsed plasmas for microelectronics processing, primarily for silicon and conductor etch applications, highlighting the potential benefits to date and challenges in extending the technology for mass-production. Schemes such as source pulsing, bias pulsing, synchronous pulsing, and others in conventional high-density plasma reactors used in the semiconductor industry have demonstrated greater flexibility in controlling critical plasma parameters such as ion and radical densities, ion energies, and electron temperature. Specifically, plasma pulsing allows for independent control of ion flux and neutral radicals flux to the wafer, which is key to eliminating several feature profile distortions at the nanometer scale. However, such flexibility might also introduce some difficulty in developing new etching processes based on pulsed plasmas. Therefore, the main characteristics of continuous wave plasmas and different pulsing schemes are compared to provide guidelines for implementing different schemes in advanced plasma etching processes based on results from a particularly challenging etch process in an industrial reactor.

Reducing damage to Si substrates during gate etching processes by synchronous plasma pulsing

Plasma oxidation of the c-Si substrate through a very thin gate oxide layer can be observed during HBr/O2/Ar based plasma overetch steps of gate etch processes. This phenomenon generates the so-called silicon recess in the channel and source/drain regions of the transistors. In this work, the authors compare the silicon recess generated by continuous wave HBr/O2/Ar plasmas and synchronous pulsed HBr/O2/Ar plasmas. Thin SiO2 layers are exposed to continuous and pulsed HBr/O2/Ar plasmas, reproducing the overetch process conditions of a typical gate etch process. Using in situ ellipsometry and angle resolved X-ray photoelectron spectroscopy, the authors demonstrate that the oxidized layer which leads to silicon recess can be reduced from 4 to 0.8 nm by pulsing the plasma in synchronous mode.

Ion flux and ion distribution function measurements in synchronously pulsed inductively coupled plasmas

Changes in the ion flux and the time-averaged ion distribution functions are reported for pulsed, inductively coupled RF plasmas (ICPs) operated over a range of duty cycles. For helium and argon plasmas, the ion flux increases rapidly after the start of the RF pulse and after about 50 μs reaches the same steady state value as that in continuous ICPs. Therefore, when the plasma is pulsed at 1 kHz, the ion flux during the pulse has a value that is almost independent of the duty cycle. By contrast, in molecular electronegative chlorine/chlorosilane plasmas, the ion flux during the pulse reaches a steady state value that depends strongly on the duty cycle. This is because both the plasma chemistry and the electronegativity depend on the duty cycle. As a result, the ion flux is 15 times smaller in a pulsed 10% duty cycle plasma than in the continuous wave (CW) plasma. The consequence is that for a given synchronous RF biasing of a wafer-chuck, the ion energy is much higher in the pulsed plasma than it is in the CW plasma of chlorine/chlorosilane. Under these conditions, the wafer is bombarded by a low flux of very energetic ions, very much as it would in a low density, capacitively coupled plasma. Therefore, one can extend the operating range of ICPs through synchronous pulsing of the inductive excitation and capacitive chuck-bias, offering new means by which to control plasma etching.

Roughening of porous SiCOH materials in fluorocarbon plasmas

Porous SiCOH materials integration for integrated circuits faces serious challenges such as roughening during the etch process. In this study, atomic force microscopy is used to investigate the kinetics of SiCOH materials roughening when they are etched in fluorocarbon plasmas. We show that the root mean square roughness and the correlation length linearly increase with the etched depth, after an initiation period. We propose that: (1) during the first few seconds of the etch process, the surface of porous SiCOH materials gets denser. (2) Cracks are formed, leading to the formation of deep and narrow pits. (3) Plasma radicals diffuse through those pits and the pore network and modify the porous material at the bottom of the pits. (4) The difference in material density and composition between the surface and the bottom of the pits leads to a difference in etch rate and an amplification of the roughness. In addition to this intrinsic roughening mechanism, the presence of a metallic mask (titanium nitride) c...

Silicon recess minimization during gate patterning using synchronous plasma pulsing

With the emergence of new semiconductor devices and architectures, there is a real need to limit plasma induced damage. This study clearly demonstrates the capability of pulsed plasma technology to minimize plasma induced silicon oxidation that leads to the silicon recess phenomenon during polysilicon gate patterning. Indeed, the authors show that by pulsing optimized continuous wave overetch plasma conditions using HBr/He/O2 plasmas, the silicon recess is reduced from 0.6 to 0.2 nm, while the gate profiles are maintained anisotropic. Synchronous pulsed plasmas open new paths to pattern complex stacks of ultrathin materials without surface damage.

Impact of low-k structure and porosity on etch processes

The fabrication of interconnects in integrated circuits requires the use of porous low dielectric constant materials that are unfortunately very sensitive to plasma processes. In this paper, the authors investigate the etch mechanism in fluorocarbon-based plasmas of oxycarbosilane (OCS) copolymer films with varying porosity and dielectric constants. They show that the etch behavior does not depend on the material structure that is disrupted by the ion bombardment during the etch process. The smaller pore size and increased carbon content of the OCS copolymer films minimize plasma-induced damage and prevent the etch stop phenomenon. These superior mechanical properties make OCS copolymer films promising candidates for replacing current low-k dielectric materials in future generation devices.

Patterning of porous SiOCH using an organic mask: Comparison with a metallic masking strategy

The etching of sub-100-nm porous dielectric trenches has been investigated using an organic mask. The etching process that is performed in an oxide etcher is composed of three steps: a thin dielectric antireflective coating (DARC) layer (silicon containing layer) is etched in the first step, the organic mask [carbon-based layer (CL)] is opened in the second step, and the dielectric layer is etched in the last step. The DARC layer is open in a fluorocarbon-based plasma (CF4∕Ar∕CH2F2) and the main critical dimension issue is the critical dimension control of the trench, which can be adjusted by controlling the amount of polymer generated by the etching chemistry (% of CH2F2). The CL is etched using NH3 based plasmas, leading to straight trench profiles. For dielectric patterning, the etch process results from a delicate trade-off between passivation layer thickness and mask faceting. This is driven by the polymerizing rate of the plasma (% of CH2F2) which controls the trench width. Using an optimized etchin...

Time-resolved ion flux, electron temperature and plasma density measurements in a pulsed Ar plasma using a capacitively coupled planar probe

The resurgence of industrial interest in pulsed radiofrequency plasmas for etching applications highlights the fact that these plasmas are much less well characterized than their continuous wave counterparts. A capacitively coupled planar probe is used to determine the time variations of the ion flux, electron temperature (of the high-energy tail of the electron energy distribution function) and plasma density. For a pulsing frequency of 1 kHz or higher, the plasma never reaches a steady state during the on-time and is not fully extinguished during the off-time. The drop of plasma density during the off-time leads to an overshoot in the electron temperature at the beginning of each pulse, particularly at low frequencies, in good agreement with modeling results from the literature.

Etching mechanisms of thin SiO2 exposed to Cl2 plasma

Plasma etching is the most standard patterning technology used in micro- and nano-technologies. Chlorine-based plasmas are often used for silicon etching. However, the behavior of thin silicon oxide exposed to such a plasma is still not fully understood. In this paper, we investigate how a thin silicon oxide layer on silicon behaves when it is exposed to a Cl2 plasma. The authors show that chlorine atoms diffuse and/or Cl+ ions are implanted through the thin (<2.5 nm) oxide, leading to the formation of a SiClx interface layer between the two layers of Si and SiO2. Chlorine accumulates at the interface until the SiO2 is thin enough to release volatile SiClx species and the silicon begins to be etched.

Atomic-scale silicon etching control using pulsed Cl2 plasma

Plasma etching has been a key driver of miniaturization technologies toward smaller and more powerful devices in the semiconductor industry. Thin layers involved in complex stacks of materials are approaching the atomic level. Furthermore, new categories of devices have complex architectures, leading to new challenges in terms of plasma etching. New plasma processes that are capable to etch ultra-thin layers of materials with control at the atomic level are now required. In this paper, the authors demonstrate that Si etching in Cl2 plasma using plasma pulsing is a promising way to decrease the plasma-induced damage of materials. A controlled etch rate of 0.2 nm min−1 is reported by pulsing the chlorine plasma at very low duty cycles. Using quasi-in-situ angle resolved XPS analyses, they show that the surface of crystalline silicon is less chlorinated, the amorphization of the top crystalline silicon surface is decreased, and the chamber wall are less sputtered in pulsed plasmas compared to continuous wave plasmas. This is attributed to the lower density of radicals, lower ion flux, and lower V-UV flux when the plasma is pulsed.