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Dive into the research topics where Michael Grieb is active.

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Featured researches published by Michael Grieb.


Microelectronics Reliability | 2011

Investigation of the reliability of 4H–SiC MOS devices for high temperature applications

Martin Le-Huu; Holger Schmitt; Stefan Noll; Michael Grieb; Frederik Schrey; Anton J. Bauer; L. Frey; H. Ryssel

Abstract In this paper, the excellent reliability of 4H–SiC MOS devices during high temperature operation is demonstrated for a gate oxide processed in N 2 O. A temperature dependent Fowler–Nordheim analysis is used to show that statistical energy spreading accounts for only part of the reported temperature induced barrier height degradation. Poole–Frenkel current caused by acceptor like traps in the oxide due to carbon interstitials is proposed to be responsible for the additional current observed. Temperature and electric field acceleration of the time to dielectric breakdown is investigated at elevated temperatures in order to predict the expected MOS lifetime during high temperature operation.


Materials Science Forum | 2009

Electrical Characterization of MOS Structures with Deposited Oxides Annealed in N2O or NO

Michael Grieb; Masato Noborio; Dethard Peters; Anton J. Bauer; Peter Friedrichs; Tsunenobu Kimoto; H. Ryssel

In this work, the electrical characteristics and the reliability of 80nm thick deposited oxides annealed in NO and N2O on the 4H-SiC Si-face for gate oxide application in MOS devices is analyzed by C-V, I-V measurements and by constant current stress. Compared to thermally grown oxides, the deposited oxides annealed in N2O or NO showed improved electrical properties. Dit-values lower than 1011cm-2eV-1 have been achieved for the NO sample. The intrinsic QBD-values of deposited and annealed oxides are one order of magnitudes higher than the highest values reported for thermally grown oxides. Also MOSFETS were fabricated with a channel mobility of 20.05 cm2/Vs for the NO annealed deposited oxide. Furthermore annealing in NO is preferred to annealing in N2O regarding µFE- and QBD-values.


Materials Science Forum | 2010

Comparison of the Threshold-Voltage Stability of SiC MOSFETs with Thermally Grown and Deposited Gate Oxides

Michael Grieb; Masato Noborio; Dethard Peters; Anton J. Bauer; Peter Friedrichs; Tsunenobu Kimoto; H. Ryssel

The electrical characteristics and the reliability of different oxides on the 4H-SiC Si-face for gate oxide application in MOS devices are compared under MOSFET operation conditions at room temperature, at 100°C and at 130°C. The oxides are either an 80nm thick deposited oxide annealed in NO or an 80nm thick grown oxide in diluted N2O. The deposited oxide shows significant higher QBD- and lower Dit-values as well as a stronger decrease of drain current under stress than the grown oxide. Although for the deposited oxide, the leakage current below subthreshold increases more than one order of magnitude during constant circuit stress at room temperature, for the thermal oxide it is quite constant, but at higher level for higher temperatures.


Materials Science Forum | 2010

NMOS Logic Circuits Using 4H-SiC MOSFETs for High Temperature Applications

Martin Le-Huu; Frederik Schrey; Michael Grieb; H. Schmitt; Volker Haeublein; Anton J. Bauer; H. Ryssel; Lothar Frey

Normally-off 4H-SiC MOSFETs are used to build NMOS logic gates intended for high temperature operation. The logic gates are characterized between 25°C and 500°C. Stable gate operation for more than 200h at 400°C in air is demonstrated. The excellent MOS reliability is quantified using I-V curves to dielectric breakdown and constant voltage stress to breakdown at 400°C. Although the effective tunneling barrier height B for electrons lowers to 2eV at 400°C, the extrapolated lifetime from constant voltage stress to breakdown measurements is longer than 105h at 400°C for typical logic gate operating field strength of 2MV/cm.


Materials Science Forum | 2013

Electrical Impact of the Aluminum P-Implant Annealing on Lateral MOSFET Transistors on 4H-SiC N-Epi

Stefan Noll; Dick Scholten; Michael Grieb; Anton J. Bauer; L. Frey

In this work we investigate the effect of the aluminum p-well implant annealing process on the electrical properties of lateral 4H-SiC MOSFET transistors. The interface trap concentration was measured by quasi-static capacitive voltage (QSCV) and negative bias stress measurements on MOSFETs. We found that higher annealing temperatures significantly reduce the trap density in the lower bandgap, and as a consequence the threshold voltage drift of the transistor after negative stress is reduced.


Japanese Journal of Applied Physics | 2011

Reliability of Nitrided Gate Oxides for N- and P-Type 4H-SiC(0001) Metal?Oxide?Semiconductor Devices

Masato Noborio; Michael Grieb; Anton J. Bauer; Dethard Peters; Peter Friedrichs; Jun Suda; Tsunenobu Kimoto

In this paper, we have investigated reliability of n- and p-type 4H-SiC(0001) metal–oxide–semiconductor (MOS) devices with N2O-grown oxides and deposited oxides annealed in N2O. From the results of time-dependent dielectric breakdown (TDDB) tests, it is revealed that the N2O-grown oxides have relatively-high reliability (4–30 C cm-2 for n- and p-MOS structures). In addition, the deposited SiO2 on n- and p-SiC exhibited a high charge-to-breakdown of 70.0 and 54.9 C cm-2, respectively. The n/p-MOS structures with the deposited SiO2 maintained a high charge-to-breakdown of 19.9/15.1 C cm-2 even at 200 °C. The deposited SiO2 annealed in N2O has promise as the gate insulator for n- and p-channel 4H-SiC(0001) MOS devices because of its high charge-to-breakdown and good interface properties.


Materials Science Forum | 2011

4H-SiC N-MOSFET Logic Circuits for High Temperature Operation

Martin Le-Huu; Michael Grieb; Frederik Schrey; H. Schmitt; Volker Haeublein; Anton J. Bauer; H. Ryssel; L. Frey

The suitability of normally-off 4H-SiC MOSFETs for high temperature operation in logic gates is investigated. Fowler-Nordheim analysis shows a lowering of the effective tunneling barrier height at elevated temperatures. Trap assisted tunneling induced by carbon interstitials is proposed as the responsible mechanism. Nevertheless, reliability of MOS devices even at 400°C is excellent with an extrapolated critical field of 2.69MV/cm for a 10 year time to dielectric breakdown. The switching behavior of logic gates is also characterized between 25°C and 400°C. Using these logic gates, a fully integrated edge triggered flip-flop is build and high temperature operation is demonstrated.


Materials Science Forum | 2008

Influence of the Oxidation Temperature and Atmosphere on the Reliability of Thick Gate Oxides on the 4H-SiC C(000-1) Face

Michael Grieb; Dethard Peters; Anton J. Bauer; Peter Friedrichs; H. Ryssel

The reliability of thermal oxides grown on n-type 4H-SiC C(000-1) face wafer has been investigated. In order to examine the influence of different oxidation atmospheres and temperatures on the reliability, metal-oxide-semiconductor capacitors were manufactured and the different oxides were characterized by C-V measurements and constant-current-stress. The N2O-oxides show the smallest flat band voltage shift compared to the ideal C-V curve and so the lowest number of effective oxide charges. They reveal also the lowest density of interface states in comparison to the other oxides grown on the C(000-1) face, but it is still higher than the best oxides on the Si(000-1) face. Higher oxidation temperatures result in smaller flat band voltage shifts and lower interface state densities. Time to breakdown measurements show that the charge-to-breakdown value of 63% cumulative failure for the N2O-oxide on the C(000-1) face is more than one order of magnitude higher than the highest values measured on the Si(000-1) face. Therefore it can be concluded that a smaller density of interface states results in a higher reliability of the oxide.


Materials Science Forum | 2013

Characterization of Diverse Gate Oxides on 4H-SiC 3D Trench-MOS Structures

Christian Tobias Banzhaf; Michael Grieb; Achim Trautmann; Anton J. Bauer; L. Frey

This study focuses on the characterization of silicon dioxide (SiO2) layers, either thermally grown or deposited on trenched 100 mm 4H-silicon carbide (SiC) wafers. We evaluate the electrical properties of silicon dioxide as a gate oxide (GOX) for 3D metal oxide semiconductor (MOS) devices, such as Trench-MOSFETs. Interface state densities (DIT) of 1*1011 cm-2 eV-1 under flat band conditions were determined using the hi-lo CV-method [1]. Furthermore, current-electric field strength (IE) measurements have been performed and are discussed. Trench-MOS structures exhibited dielectric breakdown field strengths up to 10 MV/cm.


Materials Science Forum | 2010

Electrical Characterization and Reliability of Nitrided-Gate Insulators for N- and P-Type 4H-SiC MIS Devices

Masato Noborio; Michael Grieb; Anton J. Bauer; Dethard Peters; Peter Friedrichs; Jun Suda; Tsunenobu Kimoto

In this paper, nitrided insulators such as N2O-grown oxides, deposited SiO2 annealed in N2O, and deposited SiNx/SiO2 annealed in N2O on thin-thermal oxides have been investigated for realization of high performance n- and p-type 4H-SiC MIS devices. The MIS capacitors were utilized to evaluate MIS interface characteristics and the insulator reliability. The channel mobility was determined by using the characteristics of planar MISFETs. Although the N2O-grown oxides are superior to the dry O2-grown oxides, the deposited SiO2 and the deposited SiNx/SiO2 exhibited lower interface state density (n-MIS: below 7x1011 cm-2eV-1 at EC-0.2 eV, p-MIS: below 6x1011 cm-2eV-1 at EV+0.2 eV) and higher channel mobility (n-MIS: over 25 cm2/Vs, p-MIS: over 10 cm2/Vs). In terms of reliability, the deposited SiO2 annealed in N2O exhibits a high charge-to-breakdown over 50 C/cm2 at room temperature and 15 C/cm2 at 200°C. The nitrided-gate insulators formed by deposition method have superior characteristics than the thermal oxides grown in N2O.

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