Michitaro Kanamitsu

A 4-Mb pseudo SRAM operating at 2.6+or-1 V with 3- mu A data retention current

A 4-Mb pseudo static RAM (PSRAM) suitable for universal battery usage is described. The wide voltage range, 2.6+or-1 V, is set to target the power supply voltage of the PSRAM considering various voltage levels and charging-discharging characteristics of batteries. A double-to-single automatically switchable booster is developed to provide the wide voltage range operation. To reduce the power dissipation of data retention for battery usage a low-power back-bias generator with a new substrate-level sensor and a temperature-dependent self-refresh timer with a unique internal refresh control scheme are demonstrated. A PSRAM operation ranging from 1 V to more than 5 V was obtained and a 3- mu A data retention current was realized at room temperature in contrast with 7 mu A at 70 degrees C and V/sub cc/ of 2.6 V. This PSRAM allows a 20-Mbyte RAM disk to retain data for two months with a single lithium battery. >

A 130-nm CMOS 95-mm 2 1-Gb Multilevel AG-AND-Type Flash Memory with 10-MB/s Programming Throughput

A 1-Gb AG-AND flash memory has been fabricated using 0.13-μm CMOS technology, resulting in a cell area of 0.104 μm 2 and a chip area of 95.2 mm 2 . By applying constant-charge-injection programming and source-line-select programming, a fast page programming time of 600μs is achieved. The four-bank operation attains a fast programming throughput of 10 MB/s in multilevel flash memories. The compact SRAM write buffers reduce the chip area penalty. A rewrite throughput of 8.3 MB/s is achieved by means of the RAM-write operation during the erase mode.