Min-Woo Kwon

Integrate-and-Fire Neuron Circuit and Synaptic Device with Floating Body MOSFETs

We propose an integrate-and-fire neuron circuit and synaptic device with the floating body MOSFETs. The synaptic devices consist of a floating body MOSFET for biological synaptic characteristics. The synaptic learning is performed by hole accumulation. The synaptic device has short-term and long-term memory in a single silicon device [1]. I&F neuron circuit emulate the biological neuron characteristics such as integration, threshold triggering, output generation, and refractory period using floating body MOSFET [2]. The neuron circuit and the synaptic device are connected using current mirror circuit for summation of post synaptic pulses.

Silicon-Based Floating-Body Synaptic Transistor With Frequency-Dependent Short- and Long-Term Memories

A new synaptic transistor was fabricated with two separated gates based on a FinFET structure in order to mimic short- and long-term memories in a biological synapse and connect with a postsynaptic neuron circuit directly. The transition between short- and long-term memories occurred after applying repetitive input pulses and strongly depended upon intervals between input pulses. These findings indicate that it has very similar learning characteristics with a biological synapse and the possibility as a synaptic device in neuromorphic systems.

Multi-threshold voltages in ultra thin-body devices by asymmetric dual-gate structure

Control of threshold voltage (V T) by asymmetric dual-gate structure is investigated. Two separated gates are successfully fabricated through two-step chemical mechanical polishing (CMP) processes. Silicon fin width is determined as same as the thickness of oxide sidewall spacer. V T of the device is modulated by how many charges are trapped in the nitride layer of the second gate stack (G2) through applying programming pulses to G2. They affect the formation of electron channel on the first gate (G1) side. Additionally, the efficiency of this technique is analyzed by simple capacitance network. The thinner body is the more effective the proposed V T control method is. It is noteworthy that this method can be used without ultra thin buried oxide (BOX) structure and additional biasing scheme.

Compact Neuromorphic System With Four-Terminal Si-Based Synaptic Devices for Spiking Neural Networks

In this paper, we propose a compact neuromorphic system that can work with four-terminal Si-based synaptic devices for spiking neural networks. The system consists of Si-based floating-body synaptic transistors and integrate-and-fire neuron circuit. The synaptic device can change its weight using floating-body effect and charge injection into the floating gate. The neuron circuit integrates signals from the synaptic devices through current mirrors and generates an action-potential when the integrated signal value exceeds a threshold value. The generated action potential that is transmitted to postsynaptic neurons is simultaneously returned to the back gate of the synaptic device for the change of weight based on spike-timing-dependent-plasticity. As the four-terminal synaptic device can transmit preneuron signals and change its weight at the same time, we can constitute the compact neuromorphic system without additional switches or logic operation and emulate the operation of neuron with a minimum number of devices and power dissipation (~3 pJ).

Neuron Circuit Using a Thyristor and Inter-neuron Connection with Synaptic Devices

We propose a simple and compact thyristor-based neuron circuit. The thyristor exhibits bi-stable characteristics that can mimic the action potential of the biological neuron, when it is switched between its OFF-state and ON-state with the help of assist circuit. In addition, a method of inter-neuron connection with synaptic devices is proposed, using double current mirror circuit. The circuit utilizes both short-term and long-term plasticity of the synaptic devices by flowing current through them and transferring it to the post-synaptic neuron. The double current mirror circuit is capable of shielding the pre-synaptic neuron from the post synapticneuron while transferring the signal through it, maintaining the synaptic conductance unaffected by the change in the input voltage of the post-synaptic neuron.

Integrate-and-Fire Neuron Circuit and Synaptic Device using Floating Body MOSFET with Spike Timing-Dependent Plasticity

In the previous work, we have proposed an integrate-and-fire neuron circuit and synaptic device based on the floating body MOSFET [1-3]. Integrateand- Fire(I&F) neuron circuit emulates the biological neuron characteristics such as integration, threshold triggering, output generation, refractory period using floating body MOSFET. The synaptic device has short-term and long-term memory in a single silicon device. In this paper, we connect the neuron circuit and the synaptic device using current mirror circuit for summation of post synaptic pulses. We emulate spike-timing-dependent-plasticity (STDP) characteristics of the synapse using feedback voltage without controller or clock. Using memory device in the logic circuit, we can emulate biological synapse and neuron with a small number of devices.

Integrate-and-fire neuron circuit and synaptic device with a floating body MOSFET

We propose an integrate-and-fire neuron circuit and synaptic device with the floating body MOSFETs. The synaptic devices consist of a floating body MOSFET for biological synaptic characteristics. The synaptic learning is performed by hole accumulation. The synaptic device has short-term and long-term memory in a single silicon device [1]. I&F neuron circuit emulate the biological neuron characteristics such as integration, threshold triggering, output generation, and refractory period using floating body MOSFET [2]. The neuron circuit and the synaptic device are connected using current mirror circuit for summation of post synaptic pulses.

Spiking Neural Networks with Unsupervised Learning Based on STDP Using Resistive Synaptic Devices and Analog CMOS Neuron Circuit

We designed the CMOS analog integrate and fire (I&F) neuron circuit can drive resistive synaptic device. The neuron circuit consists of a current mirror for spatial integration, a capacitor for temporal integration, asymmetric negative and positive pulse generation part, a refractory part, and finally a back-propagation pulse generation part for learning of the synaptic devices. The resistive synaptic devices were fabricated using HfOx switching layer by atomic layer deposition (ALD). The resistive synaptic device had gradual set and reset characteristics and the conductance was adjusted by spike-timing-dependent-plasticity (STDP) learning rule. We carried out circuit simulation of synaptic device and CMOS neuron circuit. And we have developed an unsupervised spiking neural networks (SNNs) for 5 × 5 pattern recognition and classification using the neuron circuit and synaptic devices. The hardware-based SNNs can autonomously and efficiently control the weight updates of the synapses between neurons, without the aid of software calculations.

Integrate-and-fire neuron circuit using positive feedback field effect transistor for low power operation

In this work, we fabricated a dual gate positive feedback field-effect transistor (FBFET) integrated with CMOS. We investigated the DC and transient characteristics of the FBFET. The fabricated FBFET has an extremely low sub-threshold slope of less than 2.3 mV/dec and low off-current. We also propose an analog integrated-and-fire neuron circuit incorporating a FBFET, which significantly reduces the power dissipation of hardware neural networks. In a conventional neuron circuit using a membrane capacitor to integrate input pulses, most of the energy is consumed by the first inverter stage connected to the capacitor. Since the membrane capacitor is charged slowly compared to digital logic, a large amount of short-circuit current flows between Vdd and ground in the first inverter during this period. In the proposed neuron circuit, the short-circuit current is significantly suppressed by adopting a FBFET in the inverter. Through TCAD mixed mode simulation of the device and the circuit, we compare the energy consumption of a conventional and the proposed neuron circuits. In a single neuron circuit with microsecond duration pulses, 58% of the energy consumption is reduced by incorporating a FBFET. We performed SPICE compact modeling of FBFET, and its parameters were fitted to match the measurement results of the fabricated FBFET. Then, we conducted a circuit simulation to verify the operating neural networks. We implemented a single layer spiking neural network (SNN) that had resistive synaptic devices. In the SNN simulation, approximately 94% of the average power consumption of all output neurons was reduced.In this work, we fabricated a dual gate positive feedback field-effect transistor (FBFET) integrated with CMOS. We investigated the DC and transient characteristics of the FBFET. The fabricated FBFET has an extremely low sub-threshold slope of less than 2.3 mV/dec and low off-current. We also propose an analog integrated-and-fire neuron circuit incorporating a FBFET, which significantly reduces the power dissipation of hardware neural networks. In a conventional neuron circuit using a membrane capacitor to integrate input pulses, most of the energy is consumed by the first inverter stage connected to the capacitor. Since the membrane capacitor is charged slowly compared to digital logic, a large amount of short-circuit current flows between Vdd and ground in the first inverter during this period. In the proposed neuron circuit, the short-circuit current is significantly suppressed by adopting a FBFET in the inverter. Through TCAD mixed mode simulation of the device and the circuit, we compare the energy c...