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A High-Power CMOS Switch Using A Novel Adaptive Voltage Swing Distribution Method in Multistack FETs

A high-power CMOS switch using a novel adaptive voltage swing distribution method in a multistack field-effect transistor (FET) scheme is proposed. The proposed adaptive voltage swing distribution method in multistack FETs is very effective in preventing unwanted channel formation with low control voltage supply in OFF-state FETs. This, in turn, increases power-handling capability when a large-signal voltage swing is applied. In the proposed CMOS switch, the behavior of the voltage swing in OFF-state multistack FETs shows a difference with respect to the level of input voltage swing. The characteristics of voltage swing distribution and leakage channel formation in the CMOS switch is fully analyzed with incorporation of the novel adaptive voltage swing distribution method into a three-stacked nMOS Rx switch in a standard 0.18-mum triple-well CMOS process. In addition, linearity of the proposed technique is verified through the measurement data of the single-pole double-throw switches that employ the proposed technique in the Rx switch. Two different types of configurations are implemented and characterized at the Rx switches, which consist of four-stacked nMOS devices, to demonstrate the method of minimizing voltage stress issues on one of the multistacked FETs. Layout consideration was also taken to prevent interference between leakage signals at the substrate. The measured performance of the proposed design shows an input 0.3-dB compression point of 33.5 dBm at 1.9 GHz. To the best of our knowledge, this is the highest power-handling capability of a CMOS switch in a standard CMOS process ever reported. The insertion losses of the Tx and Rx switches are 1.6 and 1.9 dB, respectively, at 1.9 GHz. The isolation of the Tx and Rx switches is around 20 and 30 dB, respectively, at 1.9 GHz.

A High Power CMOS Switch Using Substrate Body Switching in Multistack Structure

A novel high power CMOS RF switch using the substrate body switching technique in a multistack structure is designed, implemented, and characterized in a standard 0.18- triple-well CMOS process. One of the stacked devices in the receive side has a body switch at the bulk port in order to provide high power handling capability to the transmit switch side without compromising insertion loss to the receiver switch. The body switch connected to the bulk port at one of the receiver switches turns on in mode to minimize leakage current into path. In the meanwhile, that switch turns off in mode so that the bulk port can have body floating to reduce leakage current to substrates. Experimental data show that the switch using the body-switching technique has 1 dB of 31.5 dBm that is 2.5 dB higher than the one using the body floating technique. Insertion loss is 1.5 dB at 1.9 GHz in the transmit switch and 1.8 dB in the receiver switch. Isolation is less than 30 dB for switch and 20 dB for switch at 1.9 GHz.

Throughput improvement in interference limited multipath environments using a smart antenna for IEEE 802.11b WLAN

The results of throughput performance improvement from a ferroelectric smart antenna used in conjunction with a WLAN network interface card is presented in this paper. A two-element beamforming network was designed and implemented using ferroelectric phase shifters. The null point in the radiation pattern of the two element antenna was scanned using control software so that undesired incoming interference signals could be rejected, resulting in improved SNR for the downlink. The resulting improvement in throughput afforded by this smart antenna was compared with that of a conventional switched diversity antenna for both indoor and outdoor channels under both line-of-sight and non-line-of-sight propagation environments. The smart antenna system shows better performance in terms of data throughput rate and range extension to the access point.

Design and implementation of a ferroelectric smart antenna system for 802.11b WLANs

This paper focuses on the design and implementation of an IEEE 802.11b WLAN smart antenna system for use in 802.11b WLAN network interface cards. The 2.4 GHz ferroelectric phase shifter is the key component for a two-element beam forming network (BFN). The smart antenna system is controlled by software that automatically adjusts the beam pattern to null interference, and maximize the signal power. More than three orders of magnitude improvement in receive bit-error rate (BER) were measured when steering the antenna to the optimum position.

A Novel Multi-Stack Device Structure and its Analysis for High Power CMOS Switch Design

A novel multi-stack CMOS device structure is proposed, the operation of the structure is fully analyzed for high power CMOS switch design. The structure is also implemented in a standard 0.18-um triple-well CMOS process, and its performance is fully characterized. The proposed switch device incorporates multi-stack NMOS switches, one of which has a switch at the bulk and the others of which have a connection between the bulk and the source in order to provide high power handling capability to the transmit switch side. In order to demonstrate the improvement of power handling capability, performance of the conventional structure and the proposed structure are fully analyzed, compared from various simulation results, and verified with measurement results in detail. Experimental data show that the isolation of the proposed test structure is 25 dB higher at 30 dBm input power level than that of conventional structures, which was caused by the significant reduction of leakage current of the switch device in OFF state. In addition, insertion loss of the Rx switch can be maintained as 1.5 dB by applying body switching technique in 900 MHz.

Low-voltage ferroelectric phase shifters from L- to C-band and their applications

This paper describes the design, fabrication and test results of a family of integrated low-voltage ferroelectric phase shifters ranging in frequency of operation from 0.7 GHz to 6 GHz. All devices use a common material system of barium strontium titanate (BaxSr1-x TiO3 or BST) thin-films on a sapphire (Al2O 3) substrate. Thick copper (Cu) metallization is used to allow integration of ferroelectric varactors with high-Q inductors and other passive microwave elements. Novel bias structures have also been developed to reduce the voltages required to tune the materials to less than 20V. The flip-chip mounted devices measure less than 0.080 in. times 0.080 in.. Data for an all-pass network BST phase shifter shows that more than 100deg of differential phase shift may be obtained over a 30% fractional bandwidth. To demonstrate the utility of BST phase shifters, a two-element phased array antenna was designed and tested in conjunction with a wireless local area network (WLAN). Field tests showed that the data throughput of the WLAN was significantly improved in the presence of strong interference by use of the BST phased array antenna

A high power CMOS SP4T switch using a switched resonator for dual band applications

A novel dual-band CMOS SP4T switch with P1dB of higher than 31 dBm is designed to operate at 0.9 GHz and 1.8 GHz. In the Rx switch path, a carefully designed switched resonator is incorporated in order to block high RF signal power from the power amplifier at the Tx path as well as to maintain low insertion loss in the Rx mode simultaneously. In Tx switch devices, a body substrate tuning technique is applied to maintain high power delivery to antenna port. Extended simulation results demonstrate more than 31 dBm of P1dB at both low and high bands as well as 0.9 dB and 1.4 dB of insertion loss at 900 MHz and 1.9 GHz, respectively. To the best of our knowledge, the proposed RF switch shows the highest P1dB with a bulk CMOS based RF switch ever published. This paper also demonstrates the feasibilities of CMOS integration of RF front-end switch modules for modern wireless communication applications.

CMOS High Power SPDT Switch using Multigate Structure

A novel CMOS high power RF switch using the multi-gate structure in a 0.18-mum triple-well CMOS process is designed, implemented, and characterized. The receive switch incorporates the multi-gate structure in order to provide high power handling capability to the transmit switch side. In addition, the RF switch with the multi-gate structure reduces insertion loss more than the one with the stacked transistor by reducing parasitic capacitance to the substrate. For performance comparison purposes, a triple-gate, and dual-gate NMOS switch were fabricated and characterized. Experimental data show that the SPDT switch exhibits 26 dBm of P1dB with the triple gate structure, and 24 dBm of P1dB with the dual gate structure at 900 MHz and 1.9 GHz. The multi-gate switch demonstrates 0.2 dB lower insertion loss than the multi-stacked switch. The switch die is also minimized by employing the compact multi-gate layout structure. Compared to the multi-stacked structure using an RF NMOS device in standard CMOS process, the die size of the triple gate and the dual gate is reduced by 50 % in both cases.

3W SPDT antenna switch design using standard 0.18μm CMOS process

A high power SPDT antenna switch is designed and implemented using a standard 0.18um CMOS process. Multi-stack FETs structure with feed-forward capacitors in a Rx switch were chosen to achieve high power-handling capability of a Tx switch. Allowance of the negative voltage swing at either a source port or a drain port is ensured by applying the resistive body floating technique to the each switch device of multi-stack FETs. Intentional unequal division of the voltage swing level of the each NMOS device by the feed-forward capacitors helps the prevention of the channel formation of the OFF-state device. Experimental data shows that the proposed design achieves an 1 dB compression point of the input power at 34.5 dBm in 1.9 GHz. Also negative voltage supply at OFF state switch demonstrate further enhancement of power handling capability. The insertion loss of the Tx switch is 1.0 dB and 1.4 dB at 900 MHz and 1.9 GHz, respectively. The Rx switch has 1.4 dB and 1.8 dB insertion loss at 900 MHz and 1.9 GHz, respectively. Since the level of the power-handling capability achieved is close to the limitation of the device breakdown voltage, the reliability issue is studied in the case of both hard breakdown and soft breakdown.