Chao-Ching Cheng

Characteristics of Atomic-Layer-Deposited Al2O3 High-k Dielectric Films Grown on Ge Substrates

This paper describes the structural and electrical properties of Al 2 O 3 thin films grown through atomic layer deposition onto Ge substrates over a wide deposition temperature range (50-300°C). From grazing-incidence X-ray reflectivity and X-ray photoelectron spectroscopy, we found that increasing the deposition temperature improved the Al 2 O 3 film density and its dielectric stoichiometry; nevertheless, dielectric intermixing between main Al 2 O 3 and interfacial GeO 2 appeared at temperatures above 200°C, along with degradation of the GeO 2 /Ge interface. Accordingly, a relatively large gate leakage current (J g ) and a high density of interfacial states D it (>10 13 cm -2 eV -1 ) were observed as a result of deterioration of the entire Al 2 O 3 /Ge structure at higher deposition temperatures. In addition, although subsequent high-temperature processing at 600°C in a N 2 ambient could relieve the oxygen-excessive behavior further, i.e., to provide a more stoichiometric film, the accompanying GeO x volatilization close to the dielectric interface caused greater damage to the electrical performance. Only forming gas annealing (H 2 /N 2 , 1:10) at low temperature (300°C) improved the capacitance-voltage characteristics of the Pt/Al 2 O 3 /Ge structure, in terms of providing a lower value of D it (ca. 6 X 10 11 cm -2 eV -1 ), a lower value of J g , and a reduced hysteresis width.

High-speed GaAs metal gate semiconductor field effect transistor structure grown on a composite Ge∕GexSi1−x∕Si substrate

In this study we used a low-pressure metal organic vapor phase epitaxy method to investigate the growth of GaAs metal gate semiconductor field effect transistor (MESFET) structures on a Si substrate. The buffer layer between the Si substrate and the grown GaAs epitaxial layers was a composite Ge∕Si0.05Ge0.95∕Si0.1Ge0.9 metamorphic layer. We used transmission electron microscopy to observe the microstructures formed in the grown GaAs∕Ge∕SixGe1−x∕Si material and atomic force microscopy to analyze the surface morphology and the formation of antiphase domains in the GaAs epitaxial layers. The measured Hall electron mobility in the channel layer of a MESFET structure grown on a 6° misoriented Si substrate was 2015 cm2 V−1 s−1 with a carrier concentration of 5.0×1017 cm−3. The MESFET device fabricated on this sample exhibited good current-voltage characteristics.

Influences of surface reconstruction on the atomic-layer-deposited HfO2/Al2O3/n-InAs metal-oxide-semiconductor capacitors

We report the characteristics of HfO2/Al2O3/n-InAs metal-oxide-semiconductor capacitors on different reconstructed surface InAs substrates. The HfO2/Al2O3 gate dielectric films deposited on InAs were used to study the interfacial reaction. Compared with (2×4)-surface sample, improvements of capacitance-voltage characteristics for (1×1)-surface sample with lower frequency-dependent capacitance dispersion and higher inversion capacitance are attributed to lower indium composition and less arsenic oxide at Al2O3/InAs interface, as confirmed by x-ray photoelectron spectroscopy. It indicates that the equivalent dangling bond of cations and anions on (1×1)-surface sample tends to avoid the oxidization process and become less pinning.

Very Low V t [Ir-Hf]/HfLaO CMOS Using Novel Self-Aligned Low Temperature Shallow Junctions

We report very low V_t [Ir-Hf]/HfLaO CMOS using novel self-aligned low-temperature ultra shallow junctions with gate-first process compatible with current VLSI. At 1.2 nm EOT, good Phi_m-eff of 5.3 and 4.1 eV, low V_t of +0.05 and 0.03 V, high mobility of 90 and 243 cm²/Vs, and small 85degC BTI <32 mV (10 MV/cm, 1 hr) are measured for p- and n-MOS.

Study of thermal stability of HfOxNy/Ge capacitors using postdeposition annealing and NH3 plasma pretreatment

bNational Nano Device Laboratory, Hsinchu, Taiwan 300 We studied the thermal stability of the as-deposited HfOxNy thin films on the Ge substrate by employing rapid thermal annealing. After undergoing high-temperature processing, we observed several interesting physical and electrical features presented in the HfOxNy/Ge system, including a large Ge out-diffusion 15 atom % into high-k films, positive shift of the flatband voltage, severe charge trapping, and increased leakage current. These phenomena are closely related to the existence of GeOx defective layer and the degree of resultant GeO volatilization. We abated these undesirable effects, especially for reducing the amount of Ge incorporation 5 atom % and the substoichiometric oxide at dielectric-substrate interface, through performing NH3 plasma pretreatment on the Ge surface. These improvements can be interpreted in terms of a surface nitridation process that enhanced the thermal stability of the high-k/Ge interface. In addition, we measured that the conductance loss in inversion was still high and it revealed independence with respect to gate bias, reflecting the fact that the minority carriers in Ge can rapidly respond either through a diffusion mechanism or through midgap trap states residing in Ge bulk substrates.

Ultrathin Si capping layer suppresses charge trapping in HfOxNy/Ge metal-insulator-semiconductor capacitors

In this study the authors investigated the Ge outdiffusion characteristics of HfOxNy∕Ge metal-insulator-semiconductor capacitors to determine their charge trapping behavior. Capping the Ge substrate with an ultrathin Si layer inhibits the incorporation of Ge into the high-k bulk dielectric in the form of GeOx, thereby diminishing the resultant oxide charge trapping. The thermal stability of the entire capacitor structure was also improved after performing an additional Si passivation process.

Junction and Device Characteristics of Gate-Last Ge p- and n-MOSFETs With ALD-

In this paper, we investigated the characteristics of Ge junction diodes and gate-last p- and n-metal-oxide-semiconductor field-effect transistors with the atomic-layer-deposited- Al₂O₃ gate dielectrics. The magnitudes of the rectifying ratios for the Ge p⁺-n and n⁺-p junctions exceeded three and four orders of magnitude (in the voltage range of plusmn1 V), respectively, with accompanying reverse leakages of ca. 10^-2 and 10^-4 A ldr cm^-2, respectively. The site of the primary leakage path, at either the surface periphery or junction area, was determined by the following conditions: 1) the thermal budget during dopant activation, and 2) whether forming gas annealing (FGA) was employed or not. In addition, performing FGA at 300degC boosted the device on-current, decreased the Al₂O₃/Ge interface states to 8 times 10¹¹ cm^-2 ldr eV^-1, and improved the reliability of bias temperature instability. The peak mobility and on/off ratio reached as high as 225 cm² ldr V^-1 ldr s^-1 and > 10³, respectively, for the p-FET (<i>W</i>/<i>L</i> = 100 mum/4 mum), while these values were less than 100 cm² ldr V^-1 ldr s^-1 and ca. 10³, respectively, for the n-FET (<i>W</i>/<i>L</i> = 100 mum/9 mum). The relatively inferior n-FET performance resulted from the larger source/drain contact resistance, higher surface states scattering, and lower substrate-doping concentration.

\hbox{Al}_{2}\hbox{O}_{3}

In this study we demonstrated improved electrical characteristics of Gd 2 O 3 dielectric thin films on n-GaAs substrate by manipulating wet-chemical clean and (NH 4 ) 2 S passivation. With X-ray photoelectron spectroscopy analysis, the HCl-cleaned GaAs surface was characterized to possess oxide species mainly in the form of As 2 O x near the outmost surface and Ga 2 O x with elemental arsenic close to the interface. These undesirable components could be suppressed through rinsing in NH 4 OH alkaline solution and then performing sulfidization at 80°C, resulting in alleviating the Fermi level pinning effect on Gd 2 O 3 /GaAs capacitor performance. Higher oxide capacitance and alleviated frequency dispersion at the accumulation/depletion regimes were achieved, accompanied by negligible charge trapping (<100 mV). Accordingly, gate leakage J g was lowered to ca. 10 -5 A/cm 2 at gate voltage V g = (V FB + 1) V, which was comparable to the recently reported performance of HfO 2 /GaAs structure with an ultrathin Si/Ge interfacial layer. We attributed the electrical improvements to the enhanced stabilization of high-k/sulfur-terminated GaAs interface due to abatement of native oxides and excess arsenic segregation.

Gate Dielectric

bNational Nano Device Laboratory, Hsinchu, Taiwan 300, China We have systematically investigated the impact that postdeposition annealing PDA has on the physical and electrical properties of HfOxNy thin films sputtered on Ge and Si substrates. These two substrates display contrasting metal-oxide-semiconductor characteristics that we attribute to the different compositions of their interface layers ILs. We observed an increased GeO2 incorporation into the HfOxNy dielectric and severe volatilization of the IL on Ge after higher PDA processing. These undesired phenomena in the HfOxNy/Ge gate stacks may be responsible for their different electrical properties with respect to those of the HfOxNy/Si gate stacks, i.e., a further scaling of the capacitance-equivalent thickness, a significant presence of fixed positive charges and electron-trapping sites, and a degradation of dielectric reliability. In addition, the anomalous low-frequency-like behavior of the high-frequency capacitance‐voltage curves in inversion for the Ge capacitors was predicted from theoretical calculations.

Improved Electrical Properties of Gd2O3 ∕ GaAs Capacitor with Modified Wet-Chemical Clean and Sulfidization Procedures

We demonstrate a programmable-erasable MIS capacitor with a single layer high-/spl kappa/ AlN dielectric on Si having a high capacitance density of /spl sim/5 fF//spl mu/m/sup 2/. It has low program and erase voltages of +4 and -4 V, respectively. Such an erase function is not available in other single layer Al/sub 2/O/sub 3/, AlON, or other known high-/spl kappa/ dielectric capacitors, where the threshold voltage (V/sub th/) shifts continuously with voltage. This device exhibits good data retention with a V/sub th/ change of only 0.06 V after 10 000 s.