N.N. Ekere

Effect of particle size ratio on the conducting percolation threshold of granular conductive–insulating composites

In this paper, we apply Monte Carlo simulation to investigate the conductive percolation threshold of granular composite of conductive and insulating powders with amorphous structure. We focus on the effect of insulating to conductive particle size ratio λ = di/dc on the conducting percolation threshold pc (the volume fraction of the conductive powder). Simulation results show that, for λ = 1, the percolation threshold pc lies between simple cubic and body centred cubic site percolation thresholds, and that as λ increases the percolation threshold decreases. We also use the structural information obtained by the simulation to study the nonlinear current–voltage characteristics of composite with solid volume fraction of conductive powder below pc in terms of electron tunnelling for nanoscale powders, dielectric breakdown for microscale or larger powders, and pressing induced conduction for non-rigid insulating powders.

Thermal interface materials for automotive electronic control unit: Trends, technology and R&D challenges

Abstract The under-hood automotive ambient is harsh and its impact on electronics used in electronic control unit (ECU) assembly is a concern. The introduction of Euro 6 standard (Latest European Union Legislation) leading to increase in power density of power electronics in ECU has even amplified the device thermal challenge. Heat generated within the unit coupled with ambient temperature makes the system reliability susceptible to thermal degradation which ultimately may result in failure. Previous investigations show that the technology of thermal interface materials (TIMs) is a key to achieving good heat conductions within a package and from a package to heat sinking device. With studies suggesting that current TIMs contribute about 60% interfacial thermal resistance, a review of engineering materials has become imperative to identify TIM that could enhance heat transfer. This paper critically reviews the state-of-the-art in TIMs which may be applicable to automotive ECU. Our review shows that carbon-nanotube (CNT) when used as the structure of TIM or TIM filler could considerably advance thermal management issues by improving heat dissipation from the ECU. This search identifies chemical vapor deposition (CVD) as a low cost process for the commercial production of CNTs. In addition, this review further highlights the capability of CVD to grow nanotubes directly on a desired substrate. Other low temperature techniques of growing CNT on sensitive substrates are also presented in this paper.

Study of the interface microstructure of Sn-Ag-Cu lead-free solders and the effect of solder volume on intermetallic layer formation

There are a number of issues regarding the use of Sn-Ag-Cu alloys, including the solderability and long-term reliability of the solder joints, which require further study. The lower solderability of Sn-Ag-Cu solder can alter the interface and microstructure of the solder joint formed because of the differing reaction rates between the molten solder and substrate surface. This also has an impact on the nature and extent of the intermetallic compounds formed at the interface, as the intermetallic is generally more brittle than the base metal. This can negatively impact the solder joint reliability. In this paper we report a study on the effect of solder volume on intermetallic layer formation and thickness. For lead-free soldering this could prove to be very important, as a wide range of devices and components of varying joint size, e.g. plastic quad flat pack (PQFP), ball grid array (BGA), chip-scale packaging (CSP), and flip chip, may need to be assembled on a typical board. This means that the nature and thickness of the intermetallic layer formed for each joint size will be different. In the study, solder joints of different sizes representing different devices were used for evaluating the effect of solder volume on intermetallic compound formation. The layer thickness and microstructure were analyzed using scanning electron microscopy (SEM). SEM analysis was also carried out on joint micro-sections, which has undergone temperature cycling to evaluate the effect of intermetallic layer the joint reliability. Our results show that increasing the solder volume (and solder joint size) does not significantly affect the growth of the intermetallic layer thickness. Therefore the intermetallic layer thickness provides the lower limit for solder joint design for ultra-fine pitch flip-chip applications.

Reflow profile study of the Sn‐Ag‐Cu solder

A study of the Sn‐Ag‐Cu lead‐free solder reflow profile has been conducted. The purpose of the work was to determine the Sn‐Ag‐Cu reflow profile that produced solder bumps with a thin intermetallic compound (IMC) layer and fine microstructure. Two types of reflow profiles were studied. The results of the experiment indicated that the most significant factor in achieving a joint with a thin IMC layer and fine microstructure was the peak temperature. The results suggest that the peak temperature for the Sn‐Ag‐Cu lead‐free solder should be 230°C. The recommended time above liquidus is 40 s for the RSS reflow profile and 50‐70 s for the RTS reflow profile.

Squeegee deformation study in the stencil printing of solder pastes

We report on the results of an experimental comparison of different types of squeegee blade used in the stencil printing of solder pastes for reflow soldering in SMT, concentrating on paste heights (scooping) and printing defects. We show how our experimental results for squeegee deformation into stencil apertures lead to the construction of a model for squeegee deformation. The model takes into account the force on the squeegee due to solder paste flow and some of the non-Newtonian properties of the solder paste. An explanation is proposed for the differences in paste heights between apertures of different orientations. >

Correlation of solder paste rheology with computational simulations of the stencil printing process

Soldering technologies continue to evolve to meet the demands of the continuous miniaturisation of electronic products, particularly in the area of solder paste formulations used in the reflow soldering of surface mount devices. Stencil printing continues to be a leading process used for the deposition of solder paste onto printed circuit boards (PCBs) in the volume production of electronic assemblies, despite problems in achieving a consistent print quality at an ultra‐fine pitch. In order to eliminate these defects a good understanding of the processes involved in printing is important. Computational simulations may complement experimental print trials and paste characterisation studies, and provide an extra dimension to the understanding of the process. The characteristics and flow properties of solder pastes depend primarily on their chemical and physical composition and good material property data is essential for meaningful results to be obtained by computational simulation.This paper describes paste characterisation and computational simulation studies that have been undertaken through the collaboration of the School of Aeronautical, Mechanical and Manufacturing Engineering at Salford University and the Centre for Numerical Modelling and Process Analysis at the University of Greenwich. The rheological profile of two different paste formulations (lead and lead‐free) for sub 100 micron flip‐chip devices are tested and applied to computational simulations of their flow behaviour during the printing process.

Sub process challenges in ultra fine pitch stencil printing of type-6 and type-7 Pb-free solder pastes for flip chip assembly applications

Purpose – The study investigates the sub process behaviour in stencil printing of type‐6 and type‐7 particle size distribution (PSD) Pb‐free solder pastes to assess their printing limits.Design/methodology/approach – Two solder pastes were used in a design of experiments approach to find optimal printing parametersFindings – Solder paste printing has been achieved to ultimately produce 30 μm deposits at 60 μm pitch for full area array patterns using a type‐7 Pb‐free solder paste. For a type‐6 PSD solder paste, full area array printing was limited to 50 μm deposits at 110 μm pitch. However, for peripheral printing patterns, 50 μm deposits at 90 μm pitch were obtained. The disparities in the behaviour of the two paste types at different geometries can be attributed to differences in the sub‐processes of the stencil printing. The paste release of the type‐6 paste from the stencil apertures at fine pitch was superior to the type‐7 paste, which may be attributed to the finer particle paste producing an increas...

Critical factors affecting paste flow during the stencil printing of solder paste

The paste printing process accounts for the majority of assembly defects, and most defects originate from poor understanding of the effect of printing process parameters on the printing performance. As the current product miniaturisation trend continues, area array type package solutions are now being designed into products. The assembly of these devices requires the printing of very small solder paste deposits. The printing of solder pastes through small stencil apertures typically results in stencil clogging and incomplete transfer of paste to the PCB pads. At the very narrow aperture sizes required for flip‐chip applications, the paste rheology becomes crucial for consistent paste withdrawal. This is because, for smaller paste volumes, surface tension effects become dominant over viscous flow. Proper understanding of the effect of the key material, equipment and process parameters, and their interactions, is crucial for achieving high print yields. During the aperture filling and emptying sub‐process, the solder paste experiences forces/stresses as it interacts with the stencil aperture walls and the pad surfaces, which directly impact the paste flow within the apertures. As the substrate and stencil separate, the frictional/adhesive force on the stencil walls competes directly with the adhesives/pull force on the PCB pads, often resulting in incomplete paste transfer or skipping/clogged apertures. In this paper, we investigate the effect of stencil design on the printing process and in particular the effect on paste transfer efficiency.

The influence of wall slip in the measurement of solder paste viscosity

The wall slip phenomena is known to have a significant effect on the measurement of the viscosity of dense suspensions. In the measurement of the viscosity of solder pastes the effect of wall slip is such that the measured viscosity (also called the apparent viscosity) is much lower than the true viscosity of the paste. Therefore, correction needs to be applied to the measured viscosity in order to obtain the true viscosity of the solder paste. In this paper, we present work on the modeling of the influence of wall slip on viscosity measurement, and a model for predicting the true viscosity based on measurements using parallel plate viscometer. The apparent viscosity values measured at two different plate gaps, but at the same applied shear rate (also called the apparent shear rate), is used for predicting the true viscosity, the wall slip velocity and the thickness of the boundary slip layer. The model was validated using results from solder paste samples measured at three different plate gaps (H=0.5 mm, 1.0 mm and 1.5 mm). Our results show that the predicted values of the true viscosity using the data measured at any two gaps are in reasonably good agreement. The results also show that the influence of the wall slip is significant and that the ratio of the predicted viscosity to the apparent viscosity decreases with increasing apparent shear rate.

Understanding the process window for printing lead-free solder pastes

Solder paste is primarily used as a bonding medium for surface mount assemblies (SMA) in the electronics industry. The solder paste is typically deposited using the stencil printing process. The stencil printing of solder paste is a very important and critical stage in the reflow soldering of surface mount devices. A high proportion of all SMA defects is related to the stencil printing process. This is likely to continue with the drive towards the introduction of lead-free solder pastes. Much work is continuing on the metallurgical properties of these lead-free solders, including solder joint strength and material compatibility. However, the initial challenge for the new Pb-free formulations is in achieving repeatable solder deposit from print to print and from pad to pad. To meet this challenge, new formulations in flux medium are now being developed. For a smooth transition to Pb-free soldering formulations, a proper understanding of the printing performance of the new solder pastes is necessary. The key parameters that affect solder paste printing have been identified and the subject of numerous studies. In lead-free solder paste, the replacement of lead with other elements (including Bismuth, Copper) changes the density of this dense suspension (solder paste). In this paper, we investigate the effects of the printer parameters, i.e. squeegee speed and pressure (defined as the process window) on the printing performance of a variety of lead-free solder pastes. A three-level design of experiment on these factors (pressure and speed) was used. Comparisons will be presented with lead-rich solder pastes. The metal content of the lead-free solders had a significant effect of the on the process window.