Negin Moezi

Statistical-Variability Compact-Modeling Strategies for BSIM4 and PSP

The strategy to generate statistical model parameters is essential for variability-aware design. Based on 3D atomistic simulation results, this article evaluates the accuracy of statistical parameter generation for two industry-standard compact device models.

Benchmarking statistical compact modeling strategies for capturing device intrinsic parameter fluctuations in BSIM4 and PSP

Intrinsic statistical variability (SV) associated with discreteness of charge and granularity of matter is one of limiting factors for CMOS scaling and integration. There are several standard statistical parameter generation strategies to transfer SV information into compact models, and their accuracy is essential for achieving reliable variability aware design. We investigate the accuracy of these strategies based on the direct statistical compact model parameter extraction results for industry standard compact models BSIM4 and PSP. Statistical circuit simulation results indicate that the standard assumption for uncorrelated normal distribution of the statistical compact model parameters may introduce considerable errors in the statistical distribution of circuit figure of merits.

Modeling and simulation of transistor and circuit variability and reliability

Statistical variability associated with discreteness of charge and granularity of matter is one of limiting factors for CMOS scaling and integration. The major MOSFET statistical variability sources and corresponding physical simulations are discussed in detail. Direct statistical parameter extraction approach is presented and the scalability of 6T and 8T SRAM of bulk CMOS technology is investigated. The standard statistical parameter generation approaches are benchmarked and newly developed parameter generation approach based on nonlinear power method is outlined.

Drain Current Collapse in Nanoscaled Bulk MOSFETs Due to Random Dopant Compensation in the Source/Drain Extensions

We reveal a new statistical variability phenomenon in bulk n-channel metal-oxide-semiconductor field-effect transistors scaled down to 18-nm physical gate length. Rare but dramatic on-current degradation is observed in 3-D simulations of large ensembles of transistors that are subject to random dopant fluctuations. Physically, it originates from the random compensation of donors (from the source or drain extension) and acceptors (from halo implants) around the access regions to the channel, leading to mobile charge starvation, dramatic increase in the access resistance, and corresponding current collapse. The estimated frequency of occurrence of the phenomenon is higher than one in a hundred for a square device and higher than 10-4 for two-times-wider devices, as demonstrated by simulations of 10 000-device ensembles.

A novel approach to the statistical generation of non-normal distributed PSP compact model parameters using a nonlinear power method

Statistical variability (SV) is one of the fundamental limiting factors for future nano- CMOS scaling and integration of. Variability aware design is essential to achieve reasonable yield and reliability in the manufacture of circuit and systems. To develop effective variability aware design technologies it is essential to have a reliable and accurate statistical compact modeling strategy. In this study a nonlinear power method (NPM) based statistical compact modeling strategy is presented. The results indicate that statistical compact model parameters generated by a NPM approach are significantly better at capturing the tails and non-normal shape of statistical parameter distributions when compared with principal component analysis (PCA).

Impact of statistical parameter set selection on the statistical compact model accuracy: BSIM4 and PSP case study

Statistical compact modeling (SCM) is necessary for variability aware design at nanometer regime. An extensive study has been carried out to evaluate the impact of the statistical parameter set selection on the statistical accuracy of two widely used industry standard compact models: BSIM4 and PSP. Different statistical parameter generation strategies have been employed to examine the impact of different statistical parameter selection on both device and circuit simulation accuracy.

Capturing intrinsic parameter fluctuations using the PSP compact model

Statistical variability (SV) presents increasing challenges to CMOS scaling and integration at nanometer scales. It is essential that SV information is accurately captured by compact models in order to facilitate reliable variability aware design. Using statistical compact model parameter extraction for the new industry standard compact model PSP, we investigate the accuracy of standard statistical parameter generation strategies in statistical circuit simulations. Results indicate that the typical use of uncorrelated normal distribution of the statistical compact model parameters may introduce considerable errors in the statistical circuit simulations.

Evaluation of 35nm MOSFET capacitance components in PSP compact model

In this paper the capacitance components of the PSP compact model which is selected as successor of BSIM4 by the Compact Modelling Council (CMC) are investigated and simulated in HSPICE for the state of the art 35nm MOSFET device. The simulations are compared with TCAD results in both transcapacitance components between the device terminals and time domain to show the impact of accuracy of compact model on real circuit simulations.