Nguyen Duc Bui

A full-process damage detection method using small MOSFET and protection diode

Short constant voltage stress was applied to the gate of triple metal process transistors to uncover otherwise undetectable process-induced damage, 1 s at 9 MV/cm was enough to distinguish the damaged devices from the undamaged ones clearly in the transistor characteristics. The process damage was detected even after forming gas anneal and without using large antenna test structures to gather the charges. Also, the small diode provided a good leakage path to protect the gate from plasma process induced charging even in the reverse polarity. Diode-protected devices can be used as references in this damage detection scheme.

A via failure mode in electromigration of multilevel interconnect

Via electromigration (EM) performance of (Al-1% Si-0.5% Cu)/(Ti/TiN/Al-1% Si-0.5% Cu) metallization systems has been evaluated for vias with sizes ranging from 1 mu m to 2 mu m. The electrical open failure mode for vias was observed during EM test at high temperatures and with different current densities. The activation energy and current exponent were obtained, suggesting surface and lattice diffusion as the probable failure mechanisms. A novel observation from this study was the self-healing of failed vias when the failed chains were stored at room or high temperatures. A model for the failure mechanism is proposed.<<ETX>>

A Quick Experimental Technique In Estimating The Cumulative Plasma Charging Current with MOSFET and Determining The Reliability of The Protection Diode In The Plasma Ambient

We developed a quick experimental technique for evaluating the cumulative plasma charging current density with MOSFETs. A one second stress at 9 volts for gate oxide thickness of 100A is sufficient to force the Fowler-Nordheim tunneling condition to reveal the plasma-induced oxide damages to the MOSFET, then the oxide damages can be easily characterized by I-V meansurement. In addition, we suggested an experimental method in estimating the limitation and reliability of the protection diode in the plasma ambient under various plasma charging conditions.

Dependence of electromigration failure modes on EM-induced and thermally-induced mechanical stress in interconnect lines

Experimental verification of electromigration failure modes on the mechanical stress state of interconnects line during accelerated EM tests is presented in this paper. The electromigration failure mode and failure rate during accelerated electromigration testing is expected to be strongly affected by the mechanical stress state of Al lines, since tensile stress and compressive stress states favor void growth and hillock formations, respectively. During electromigration testing, the mechanical stress state or evolution of mechanical stress of an interconnect is a function of current density and temperature, the two principal variables in electromigration testing. In our experiments, we have observed two different electromigration failure modes by varying the current density and temperatures where (i) the passivated Al lines tested at high current density and high temperatures failed by hillock type failure and (ii) the interconnect lines tested at low current density and moderate temperatures failed by vo...

Effect of Mechanical Stress on Electromigration Failure Mode During Accelerated Electromigration Tests

The electromigration failure mode and failure rate during accelerated electromigration testing is expected to be strongly affected by the mechanical stress state of Al lines, since tensile stress and compressive stress states favor void growth and hillock formations (extrusions), respectively. During electromigration testing, the mechanical stress state or evolution of mechanical stress of an interconnect is a function of current density and temperature, the two principal variables in electromigration testing. In our experiments, we have observed two different electromigration failure modes by varying the current density and temperatures where (i) the passivated Al lines tested at high current density and high temperatures failed by extrusion or hillock type failure and (ii) the interconnect lines tested at low current density and moderate temperature failed by voiding. A mechanical stress model which incorporates both the thermally generated stress and electromigration induced mechanical stress is invoked to explain the electromigration failure mode selection observed in our experiments.