Nicholas George Koopman

Chip-To-Package Interconnections

Integration of circuits to semiconductor devices, driving the need for improvements in packaging, has been discussed in Chapter 7,“Microelectronics Packaging—An Overview. ” This is further illustrated in Figure 8-1, wherein the cost of interconnecting on silicon is compared with interconnecting on ceramic substrates and on organic boards, clearly showing the lower cost of interconnecting on silicon [1]. Although the trend is toward total integration on Si there is, however, a practical, growing limit to the number of circuits which can be made on a single piece of silicon, which is currently at about 1.6 million circuits for CMOS logic, 40,000 circuits for bipolar logic, and 64 megabits for memory. The highest integrated transistor counts are approximately 5 million on advanced microprocessors. Therefore, because most current information systems require a greater number of circuits and interconnections, a number of chips still need to be interconnected on organic or ceramic first-level packages. The electrical connections between the chip and the package, referred to here as chip-level interconnections, are the subject matter of this chapter. Because, for the systems considered here, no first-level package can usually accommodate all the required chips, a second-level package interconnecting the first levels is often required. These interconnections, referred to as package-to-board interconnections, are reviewed in Chapter 16. A recent deviation from this packaging pattern, also to be discussed, is the direct surface mounting of flip chips on FR4 cards or flexible circuits which is referred to as direct chip attach (DCA) or chip-on-board (COB).