Nobuo Owada

Abrasive‐Free Polishing for Copper Damascene Interconnection

A complete abrasive‐free process for fabricating copper damascene interconnection has been developed. The process is a combination of newly developed abrasive‐free polishing (AFP) of Cu and dry etching of a barrier metal layer. A new aqueous chemical polishing solution and a polyurethane polishing pad produce complete stop‐on‐barrier characteristics of Cu polishing. The AFP provides a very clean, scratch‐free, anticorrosive polished surface, and the total depth of erosion and dishing is reduced to less than one fifth of that produced by conventional slurries, even after 100% overpolishing. The barrier metal is successfully dry etched by using gas at a high selectivity ratio (more than 10) of barrier metal to . It was found that the developed AFP significantly reduces both Cu line resistance and its deviation. Moreover, AFP can also contribute to cost reduction of chemical mechanical polishing and help solve environmental problems related to waste slurries.

Control of Photocorrosion in the Copper Damascene Process

Since chemical mechanical polishing for damascene processes producing copper interconnections is a wet-chemical treatment, corrosion control is indispensable. In addition to ordinary corrosion due to chemical and galvanic reactions with slurries, a new type of corrosion, pattern-specific corrosion, was found. It was clarified to be a kind of anodic corrosion observed only when the damascene process was used to make copper interconnections for active devices, occurring after the metal polishing is completed and the electrodes are electrically separated from each other. A positive potential is generated on the copper electrodes connected to the p + -diffused region against that connected to the n + -diffused region of a p-n junction when the fabrication is carried out in a light environment. The positively biased electrodes corrode quickly, especially in diluted rather than undiluted slurries, resulting in pattern-specific photocorrosion. Less corrosive slurries, especially in diluted state, or corrosion-preventing cleaning methods are therefore needed.

TDDB improvement in Cu metallization under bias stress

Time-dependent dielectric breakdown (TDDB) between Cu interconnects is investigated. TDDB lifetime strongly depends on the surface condition of the Cu interconnect and surrounding pTEOS. A NH/sub 3/-plamsa treatment prior to cap-pSiN deposition on Cu interconnect improved the dielectric breakdown lifetime (/spl tau//sub BD/) over cap-pSiN deposition only. The plasma treatment also has the beneficial effect of suppressing wiring resistance increase during pSiN deposition. These results suggest that CuO reduction to Cu, and CuN formation at the Cu interconnect surface prevents Cu silicidation during pSiN deposition. Furthermore, SiN formation and bond termination by hydrogen radicals at the pTEOS surface diminish surface defects, such as dangling bonds. TDDB lifetime also strongly depends on the Cu CMP process, in which mechanical damage of the SiO/sub 2/ surface during CMP process degrades TDDB. Adoption of a mechanical damage free slurry or a post-CMP HF treatment to remove the damaged layer from the surface improves TDDB.

Direct measurement of localized joule heating in silicon devices by means of newly developed high resolution IR microscopy

A high resolution IR microscope, especially designed for measuring localized joule heating effect in silicon devices, has been developed by combining a ZnS objective lens and a HgCdTe infrared detector. This microscope has achieved the practical spatial resolution of 10 mu m and practical temperature resolution of 0.24 K. With this IR microscope, the joule heating effect in poly-Si (polycrystalline silicon) thin film resistors formed on SiO/sub 2/ thin layer has been measured, simulating SOI (silicon on insulator) structures. A significant temperature rise was observed in this device structure, because of the low thermal conductivity of the SiO/sub 2/ layer, suggesting the possibility of new reliability problems caused by the joule heating effect in SOI structures.<<ETX>>

Molecular dynamics analysis of reflow process of sputtered aluminum films

It is important that aluminum films fill the grooves on silicon substrates if high-density devices are to be produced. In this paper, we calculate the changes in the free-surface profiles of deposited aluminum films in a high-temperature reflow process on flat and grooved substrates using a molecular dynamics simulation. We use an atomic-scale model to analyze the micron-scale flow on the substrates. The relationships between droplet formation and the parameters of initial film-thickness distribution, aluminum film temperature, and bond energy between the aluminum and substrate atoms are also investigated. When the film at the bottom of the groove walls is thick, film breaks are observed at the top of the groove walls and a large volume of the film flows into the bottom of the groove. We also calculate the change in the aluminum-film profiles for a high-temperature sputtering deposition process.

Reliability study on polycrystalline silicon thin film resistors used in LSIs under thermal and electrical stress

A general expression for the sheet resistivity increase of polycrystalline silicon (poly-Si) resistors formed on field oxide under thermal and electrical stress is determined. The increase ratio of the resistivity under thermal stress is proportional to its initial value and square root of aging time with the activation energy of 0.68+or-0.22 eV. The increase ratio of the resistivity under constant DC current is also proportional to the square root of testing time, indicating that this increase is due to the effect of the above-mentioned thermal stress. Carrier trapping center generation is the poly-Si film caused by contact metallization is proposed for this phenomenon.<<ETX>>

Reliability improvement in blanket tungsten CVD contact filling process for high aspect ratio contact

The reliability improvement of submicron contacts filled by a blanket tungsten process is studied. It is found that, for contacts with an aspect ratio around 2.0, the contact resistance is initially high and increases drastically with additional heat treatment, finally resulting in open failure. This failure mode is caused by chemical reaction on the interface through a previously deposited, porous, glue layer of sputtered tungsten during high-pressure blanket tungsten CVD processing. This reaction occurs at the bottom corner of the contact. A few minutes of hydrogen annealing, followed by a low-pressure hydrogen reduction CVD tungsten nucleation step, suppresses the failure mode drastically. A mechanism for this process in which hydrogen annealing induces selective growth of CVD tungsten only around weak spots in the sputtered tungsten film, thus suppressing WF/sub 6/ intrusion, is proposed.<<ETX>>

Reliability improvement in high aspect ratio contacts and vias filled with blanket tungsten CVD film

This paper reports a new open failure observed in high aspect ratio contacts and vias filled with blanket tungsten CVD film. This failure mode has been proved to be induced by the poor film quality of the sputtered glue layer at the bottom of a hole. Open failure in contacts has been suppressed by lowering the deposition temperature of the sputtered glue layer together with the optimization of CVD process conditions. Open failure in vias has been suppressed by collimation sputtering of the glue layer at low temperature.

The Lack of Trapping Centers for Positrons at the Interface of W/Si System and the Investigation of the Depletion Layer in the Schottky Barrier by Positrons as Test Charge Simulating Holes

Interfacial phenomena in the W-Si systems were studied by a monoenergetic positron beam. Doppler broadening profiles of the positron annihilation were measured as a function of incident positron energy. Tungsten thin films of 100 nm in thickness were deposited on p-type, 10 »cm Cz-grown Si wafers with (100) orientation by the DC magnetron sputtering method. Specimens were annealed at various temperatures in order to form suicides. It was found that the position of the interface of both W/Si and W silicide/Si is very different from the position expected from a simple situation neglecting the effect of electric field on the diffusion of positrons. This fact arouse the utility of positrons as a test charge to probe directly the electric field gradient in the Schottky barrier.

In Situ TEM Observation of Defects and Amorphous Phase in Si Wafer During Ion Implantation

In situ TEM observations of defects and. the amorphous phase in Si wafer during 150 keV Ar + ion implantation were made which elucidated their characteristic behavior in Si. Defects introduced by ion implantation were eliminated by amorphous phase formation and then new defects did not form in the amorphous phase. Microstructural evolution in Si wafers under high dose implantation (2E16 ions/cm 2 ) of 400 keV Si * ions was also investigated at temperatures of -70, -30, 20, 100 and 200 °C using a cross-section 1 TEM observation technique. At temperature of 20 °C and above, a defect layer was formed in each specimen, and the defect density was observed to decrease as temperature increased. At temperture of -30 °C and below the amorphous phase was formed and a defect layer which made contact with this phase was also observed. After annealing of these implanted specimens at 850 °C for 20 min, the amorphous phase had crystallized and the defect layer in contact with the amorphous phase was almost eliminated. But another defect layer was formed during annealing in the region where the amorphous phase had existed.