Øivind Næss
University of Oslo
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Publication
Featured researches published by Øivind Næss.
IEEE Transactions on Circuits and Systems Ii: Analog and Digital Signal Processing | 2001
Yngvar Berg; Tor Sverre Lande; Øivind Næss
A programming technique for controlling the floating gates (FGs) in ultra-low-voltage (ULV) floating-gate circuits is presented. Simple ULV PG current-scaling and level-shifting circuits are discussed. The current scaling and level shifting are accomplished using only minimum sized transistors and floating capacitors. Floating-gate current multiplier and divider circuits are described. Measured results are provided,.
IEEE Transactions on Circuits and Systems Ii: Analog and Digital Signal Processing | 2001
Yngvar Berg; Tor Sverre Lande; Øivind Næss; Henning Gundersen
Ultra-low-voltage (ULV) floating-gate differential amplifiers are presented. In this paper, we present several different approaches to CMOS ULV amplifier design. Sinh-shaped and tanh-shaped transconductance amplifiers are described. Measured results are provided.
international symposium on circuits and systems | 2000
Yngvar Berg; Øivind Næss; Mats Høvin
In this paper we describe ultra low-voltage (ULV) rail-to-rail CMOS TANH shaped transconductance amplifiers using floating gates. The OTA can operate with a supply voltage down to 200 mV. Preliminary simulation results of the differential ULV amplifier are provided.
international symposium on circuits and systems | 2003
Øivind Næss; Espen A. Olsen; Yngvar Berg; Tor Sverre Lande
We present a low-voltage/low power second order filter. The filter consists of 6 pseudo floating-gate transistors operated in weak inversion. The filter is suitable for any kind of application requiring low frequency ranges, such as biomedical products. An electronic cochlea consisting of replicas of the filter is presented. The filter operates at a supply voltage below 1 V, consumes power down to 5 nW, and has a harmonic distortion suppression of -60 dB.
norchip | 2009
Tuan Anh Vu; Malihe Zarre Dooghabadi; Shanthi Sudalaiyandi; Hakon A. Hjortland; Øivind Næss; Tor Sverre Lande; Svein-Erik Hamran
In this paper, two different types of Vivaldi antenna are designed and tested suitable for electromagnetic beamforming. The first is an antipodal Vivaldi antenna, while the other is a tapered slot Vivaldi antenna. They are both ultra wideband antennas for the 1 GHz to 5 GHz frequency band. They have low impulse distortion and the voltage standing wave ratio (VSWR) less than 2 throughout the entire bandwidth. The antennas are used for impulse radio beamforming.
international symposium on circuits and systems | 2011
Kin Keung Lee; Malihe Zarre Dooghabadi; Hakon A. Hjortland; Øivind Næss; Tor Sverre Lande
A low-power impulse radio (IR) ultra wideband (UWB) pulse generator (PG) is presented. It uses digital gate-delay for timing achieving good power efficiency and acceptable spectral filling. The circuit is scalable in both bandwidth and center frequency. Both energy consumption and chip area are reduced compared to most conventional higher order Gaussian PGs. The PG is realized in a TSMC 90 nm CMOS process. Measurements show the energy consumption from a 1.2 V to be 5.2 pJ/pulse for a 200 MHz pulse repetition frequency (PRF). The core area is 0.0015 mm2 (38 µm×40 µm). Lastly, a dynamic pre-charge (DPC) scheme is proposed to eliminate the standby current and make the PG favourable for low-data-rate applications.
international conference on electronics, circuits, and systems | 2002
Yngvar Berg; Øivind Næss; Snorre Aunet; J. Lomsdalen; Mats Høvin
In this paper, we present a novel floating-gate binary to multiple-valued converter for use in multiple-valued (MV) digital CMOS design. Techniques for reducing power supply noise are addressed and a binary to 4 bit (radix 16) MV converter is discussed. The converter has been sent for fabrication and measured results should be available. Simulation results obtained from Matlab and SpectreS are presented.
international symposium on circuits and systems | 2002
Øivind Næss; Yngvar Berg
Presents a six transistor fully differential dual-ended low-voltage (ULV) FGUVMOS operational transconductance amplifier (FGUVMOS-OTA), and a Gm-C filter where the FGUVMOS-OTA is used. The OTA has rail-to-rail operation. A basic Gm-C filter implemented with the OTA is presented. The cut-off frequency of the filter is tunable over almost 6 decades with a supply voltage below 1 V.
norchip | 2001
Yngvar Berg; Øivind Næss; Mats Høvin; Henning Gundersen
This paper presents an approach to programming threshold voltages in floating-gate CMOS circuits. The threshold voltage programming is exploited in ultra low-voltage (ULV) amplifier design. A threshold voltage programming scheme is presented and several examples of analog ULV circuits are described. The ULV circuits are used in ULV amplifier design. Measured data are provided.
asia pacific conference on circuits and systems | 2012
Tuan Anh Vu; Shanthi Sudalaiyandi; Hakon A. Hjortland; Øivind Næss; Tor Sverre Lande; Svein-Erik Hamran
This paper presents a novel variable-gain single-bit ultra-wideband (UWB) quantizer suitable for baseband receiver front-end fabricated in 90 nm CMOS technology. The prototype chip is tested, and measurement results are provided. The proposed quantizer achieves a -3 dB bandwidth covering a spectrum from 10 MHz to 2.7 GHz. The overall gain can be varied from 23 dB to 33 dB while the noise figure (NF) is between 7 dB and 10 dB. The quantizer core occupies a die area of 0.25 × 0.17 mm2 and consumes 4.8 mW from a 1.2 V supply voltage.