Mats Høvin

Delta-sigma modulators using frequency-modulated intermediate values

This paper describes a new first- and second-order delta-sigma modulator concept where the first integrator is extracted and implemented by a frequency modulator with the modulating signal as the input. The result is a simple delta-sigma modulator with no need for digital-to-analog converters, allowing straightforward multibit quantization. Without the frequency modulator, the circuit becomes a frequency-to-digital converter with delta-sigma noise shaping. An experimental first- and second-order modulator has been implemented in a 1.2-/spl mu/m standard digital CMOS process and the results confirm the theory. For the first-order modulator an input signal amplitude of 150 mV resulted in a signal-to-quantization noise ratio (SQNR) of /spl ap/115 dB at 2 MHz sampling frequency and signal bandwidth of 500 Hz.

Novel recharge semi-floating-gate CMOS logic for multiple-valued systems

In this paper we present novel recharged logic for multiple-valued (MV) systems by utilizing semi-floating-gate (SFG) transistors. The recharged multiple-valued logic can be used to implement low-power digital circuits. The improvement in power dissipation is mainly in reduced dynamic power dissipation. The main purpose is to level out the power dissipated by a digital system to obtain more suitable logic for mixed mode design.

Delta-sigma converters using frequency-modulated intermediate values

This paper describes a new first and second-order delta-sigma modulator (DSM) concept where the first integrator is extracted and implemented by a FM oscillator with the modulating signal as the input. The result is a simple DSM with no need for DACs, allowing straightforward multi-bit quantization. Without the FM oscillator, the modulator becomes a F/D converter with delta-sigma noise shaping.

Intermediate Level FPGA Reconfiguration for an Online EHW Pattern Recognition System

We propose a field programmable gate array (FPGA) implementation for a run-time adaptable evolvable hardware classifier system. Previous implementations have been based on a high-level virtual reconfigurable circuit technique which requires many FPGA resources. We therefore apply an intermediate level reconfiguration technique which consists of using the FPGA lookup tables as shift registers for reconfiguration purposes. This leads to significant resource savings, reducing the classifier circuit size to less than one third of the original implementation. This in turn has made it possible to implement a larger, more accurate classifier than before, giving 97.5% recognition accuracy for a face image application. Experiments also show that a reduction of data element resolution can lead to further resource savings while still maintaining high classification accuracy.

Ultra low-voltage floating-gate transconductance amplifier

In this paper we describe ultra low-voltage (ULV) rail-to-rail CMOS TANH shaped transconductance amplifiers using floating gates. The OTA can operate with a supply voltage down to 200 mV. Preliminary simulation results of the differential ULV amplifier are provided.

A narrow-band delta-sigma frequency-to-digital converter

This paper describes a novel frequency-to-digital conversion technique based on the D flip-flop frequency delta-sigma concept. It is shown that given some frequency constraints, there is no need for using a sampling frequency twice the maximum FM frequency. For narrow-band FM demodulation, it is further shown that by sampling the clock signal width of the FM signal, the digital resolution is more effectively increased by raising the constant clock frequency. A narrow-band D flip-flop frequency-to-digital converter have been realized in a FPGA confirming the theory.

A VLSI communication architecture for stochastically pulse-encoded analog signals

A new architecture for interchip communication in pulse coded analog VLSI systems is presented. Interchip communication methods can be compared roughly to computer communication protocols, allowing the use of some known results from computer network theory. We briefly discuss our solution relative to two existing solutions, and present some measured results.

Adaptive variable neighborhood search for solving multi-objective facility layout problems with unequal area facilities

Abstract In this paper, we report the results of our investigation of an evolutionary approach for solving the unequal area multi-objective facility layout problem (FLP) using the variable neighborhood search (VNS) with an adaptive scheme that presents the final layouts as a set of Pareto-optimal solutions. The unequal area FLP comprises a class of extremely difficult and widely applicable optimization problems arising in diverse areas and meeting the requirements for real-world applications. The VNS is an explorative local search method whose basic idea is systematic change of neighborhood within a local search. Traditionally, local search is applied to the solutions of each generation of an evolutionary algorithm, and has often been criticized for wasting computation time. To address these issues, the proposed approach is composed of the VNS with a modified 1 -opt local search, an extended adaptive local search scheme for optimizing multiple objectives, and the multi-objective genetic algorithm (GA). Unlike conventional local search, the proposed adaptive local search scheme automatically determines whether the VNS is used in a GA loop or not. We investigate the performance of the proposed approach in comparison to multi-objective GA-based approaches without local search and augmented with traditional local search. The computational results indicate that the proposed approach with adaptive VNS is more efficient in most of the performance measures and can find near-optimal layouts by optimizing multiple criteria simultaneously.

Design of an adaptive interval type-2 fuzzy logic controller for the position control of a servo system with an intelligent sensor

Type-2 fuzzy logic systems are proposed as an alternative solution in the literature when a system has a large amount of uncertainties and type-1 fuzzy systems come to the limits of their performances. In this study, an adaptive type-2 fuzzy-neuro system is designed for the position control of a servo system with an intelligent sensor. The sensor gives different resistance values with respect to the stretch of it, and it is supposed to be used in an robotic arm position measurement system. These kinds of sensors can be used in human-assistance robots that have soft surfaces in order not to damage the humans. However, these sensors have time-varying gains and uncertainties that are not very easy to handle. Moreover, they generally have a hysteresis on their input-output relations. The simulation results show that the control algorithm developed gives better performances when compared to conventional type-1 fuzzy controllers on such a highly nonlinear, uncertain system.

Robot gaits evolved by combining genetic algorithms and binary hill climbing

In this paper an evolutionary algorithm is used for evolving gaits in a walking biped robot controller. The focus is fast learning in a real-time environment. An incremental approach combining a genetic algorithm (GA) with hill climbing is proposed. This combination interacts in an efficient way to generate precise walking patterns in less than 15 generations. Our proposal is compared to various versions of GA and stochastic search, and finally tested on a pneumatic biped walking robot.