Osamu Kagaya

Characterization of a planar spiral inductor on a composite-resin low-impedance substrate and its application to microwave circuits

The Q-factors of planar spiral inductors built on a polyimide-SiO/sub 2/-Si substrate are characterized as a function of the polyimide thickness. We found that inductor quality as high as that on a GaAs-microwave and millimeter-wave integrated circuit (MMIC) requires a polyimide thickness of over 100 /spl mu/m, resulting in a Q-factor of over 17. The applicability of a low-impedance substrate was confirmed through the investigation of a novel RF-MCM in a face-up-type structure for cellular phone systems using a composite epoxy resin-metallic substrate. A fabricated power amplifier module exhibited 28.5-dBm output power and 16% power efficiency at 1.75 GHz.

High-frequency properties of SrTiO3 thin-film capacitors fabricated on polymer-coated alloy substrates

Low-temperature (200 °C) sputter deposition of SrTiO3 (STO) thin films by using ultrahigh-density ceramic target enabled us to fabricate capacitors on polyimide-isoindroquinazoline dione (PIQ)- or benzocyclobutene (BCB)-coated alloy substrates. Complex impedances of the capacitors were analyzed. Capacitances of the 0.01 mm2 area capacitors with 200-nm-thick STO films were around 22 pF and were not dependent on frequency up to 8 GHz. Leakage-current densities of the films were lower than 10−6 A/cm2 at an applied voltage of 10 V and dielectric loss tangents were lower than 10−6.

2 V-operation pseudomorphic power HEMT with 62% power-added efficiency for cellular phones

We demonstrate maximum power-added efficiency of 62% with a 2-V drain bias at L-band frequencies on a pseudomorphic high electron mobility transistor (PHEMT) for use in analog cellular phones. This PHEMT is fabricated by advanced power-device technology featuring a GaAs-InGaAs-GaAs PHEMT structure with a low-temperature process and gate-stress compensation. Power performance evaluated under the Japanese standards for 1.5-GHz personal digital cellular phones (PDC) exhibits a very high power-added efficiency of 51% (54%) with an output power of 0.8 W (1.7 W) at a 2-V (3-V) drain bias. The adjacent-channel leakage is 50 dBc at 1.5 GHz +/-50 KHz when tested at this output power. These results indicate that the proposed PHEMT power device is highly suitable for use in analog and digital cellular phone systems.<<ETX>>

Selective Growth of Ultra-low Resistance GaAs/lnGaAs for High Performance lnGaAs FETs

To minimize the source resistance of a doped-channel InGaAs heterostructure FET grown on a GaAs substrate, GaAs, InGaAs and InAs selective growth conditions are studied by metalorganic vapor phase epitaxy (MOVPE). It is found that the lowest growth temperatures with complete selectivity for InGaAs (indium composition less than 0.2) and InAs are 540 and 400°C, respectively. The contact resistance at the regrown interface measured with the transmission line model (TLM), is minimized to 5 × 10-9 ω cm2 when the Si-doped GaAs is regrown using a side contact structure. However, the contact resistance increases as the In composition in the regrown InGaAs increases. This might be due to the strain or dislocations caused by lattice mismatching between GaAs and InGaAs.

A very thin power amplifier multichip module for 1.9-GHz cellular phone systems

A compact thin power amplifier module for 1.9-GHz cellular phone systems has been incorporated using MCM-D technology and planarization technology of all passive components. The module consists of four Si-MOSFETs and is 9.4/spl times/7.2/spl times/1 mm, resulting in a volume of 0.07 cc including its shield metallic case. The module was designed with the computer simulator, Libra, and simplified lumped-element equivalent circuits of passive components. The fabricated module exhibited an output power of 33.3 dBm and power efficiency of 29%. These results suggest that these technologies will be very useful for the miniaturization of circuit components for GHz-band mobile communications.

Alpha-particle-induced charge collection in p-n junction diodes in semi-insulating GaAs substrates

The bias and angle dependences of the alpha-particle-induced charge collected by GaAs p-n junction diodes are investigated. These diodes, in which the n-layer overlays the p-layer, are fabricated in a semi-insulating GaAs substrate by Si and Mg ion implantation. /sup 241/Am placed in a vacuum is used as an alpha-particle source with an initial energy of 4.03 MeV and a fluence of 5.4*10/sup -5//s/ mu m/sup 2/. The results show that the collected charge is nearly independent of the applied bias. This bias independence may be further evidence that the charge funneling process is not important in semi-insulating GaAs. A model not incorporating funneling can explain the measured angular dependence. Based on this model, the design principle for the buried p-layer structure is discussed. >